Allegro MicroSystems A8600 Manual page 49

A8600
Table 5. Pin Descriptions Table (continued)
Name Number
LX4 30 Switching node for buck regulator SW4
BOOT4 31 Floating gate drive for buck regulator SW4
HG4 29 High side gate drive for buck regulator SW4
LG4 32 Low side gate drive for buck regulator SW4
PGND 33 Power ground
CSP 27 Current sense pin for buck regulator SW4
CSN 26 Current sense pin for buck regulator SW4
FB4 25 Feedback pin for buck regulator SW4
COMP4 24 Error amplifier compensation network for regulator SW4
SS4 28 Soft start programming for regulator SW4
BUI 10 Input to the BU comparator
BUO 9 Output of the BU comparator
ACCI 8 Input to the ACC comparator
ACCO 7 Output of the ACC comparator
CTMR 5 Delay programming for the MUTE pulse circuit
MUTE 2 Open-drain, active LOW output of the MUTE pulse circuit
VINS 21 Input to the high-side switches
ENS 19 Input to enable/disable both high-side switches
OUT1 20 High-side switch S1 output
OUT2 22 High-side switch S2 output
1 Connect to Ground instead, if also SW3 and SW4 both are not used.
2 Connect to Ground instead, if also S1 and S2 both are not used.
Quadruple Output Regulator with Two High-Side Switches,
BU/ACC Voltage Detectors, and Mute Delay
Description
External Synchronous Buck Regulator (SW4)
BU, ACC, and Mute Functions
High-Side Switches (S1, S2)
Pin Connection
If Pin Function Not Used
BOOT4 (or Ground 1 )
LX4 (or Ground 1 )
Open (or Ground 1 )
Open (or Ground 1 )
(Always used)
Ground
Ground
FB2 or FB3
Ground
Ground
Ground
Open
Ground
Open
Ground
Open
V supply (or Ground 2 )
IN
Ground
OUT2 or Open
(or Ground 2 )
OUT1 or Open
(or Ground 2 )
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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