Quectel SC200L-EM Hardware Design page 24

SC200L Hardware Design
Figure 2: Voltage Drop Sample
To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used,
and a multi-layer ceramic chip capacitor (MLCC) should also be reserved due to its ultra-low ESR. It is
recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array and
place these capacitors close to VBAT_BB/RF pins. The main power supply from an external application
has to be a single voltage source and can be expanded to two sub paths with star structure. The width of
VBAT_BB trace should be no less than 3 mm. In principle, the longer the VBAT trace is, the wider it will
be.
In addition, in order to get a stable power source, it is suggested to use a TVS and place it as close to the
VBAT_BB/RF pins as possible to increase voltage surge withstand capability. The following figure shows
the star structure of the power supply.
Figure 3: Star Structure of the Power Supply
SC200L_Hardware_Design
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