Hide thumbs Also See for GW1NS Series:
Table of Contents

Advertisement

Quick Links

GW1NS series of FPGA Products
Package & Pinout User Guide
UG823-1.7.2E, 06/30/2021

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the GW1NS Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for GOWIN GW1NS Series

  • Page 1 GW1NS series of FPGA Products Package & Pinout User Guide UG823-1.7.2E, 06/30/2021...
  • Page 2 Copyright©2021 Guangdong Gowin Semiconductor Corporation. All Rights Reserved. , Gowin, and GOWINSEMI are trademarks of Guangdong Gowin Semiconductor Corporation and are registered in China, the U.S. Patent and Trademark Office, and other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders.
  • Page 3 Revision History Date Version Description 09/10/2018 1.0E Initial version published (Preliminary). 11/22/2018 1.1E Pins distribution view for different packages added.  Quantity of GW1NS-2/GW1NS-2C Pins updated; 01/10/2019 1.2E  Introduction to the I/O BANK updated. 04/03/2019 1.3E CS36 package outline updated. 10/12/2019 1.4E GW1NS-4 / GW1NS-4C added.
  • Page 4: Table Of Contents

    Contents Contents Contents ......................... i List of Figures ....................iii List of Tables ...................... iv 1 About This Guide ..................1 1.1 Purpose ..........................1 1.2 Related Documents ......................1 1.3 Abbreviations and Terminology ................... 2 1.4 Support and Feedback ....................... 2 2 Overview ......................
  • Page 5 Contents 4 Package Diagrams ..................20 4.1 QN32 Package Outline (5mm x 5mm)................20 4.2 QN32U Package Outline (5mm x 5mm) ................21 4.3 CS36 Package Outline (2.5mm x 2.5mm) ................ 22 4.4 CS36U Package Outline (2.5mm x 2.5mm) ..............23 4.5 CS49 Package Outline (2.9mm x 2.9mm) ................
  • Page 6: List Of Figures

    List of Figures List of Figures Figure 2-1 GW1NS I/O Bank Distribution ..................9 Figure 3-1 View of GW1NS-2/ GW1NS-2C QN32 Pins Distribution (Top View) ........ 11 Figure 3-2 View of GW1NS-2/GW1NS-2C QN32 Pins Distribution (Top View) ......... 12 Figure 3-3 View of GW1NS-2/GW1NS-2C CS36 Pin Distribution (Top View) ........13 Figure 3-4 View of GW1NS-2 CS36U Pins Distribution (Top View)...........
  • Page 7 Table 2-3 Quantity of GW1NS-2 / GW1NS-2C Pins ................5 Table 2-4 Quantity of GW1NS-4 / GW1NS-4C Pins ................6 Table 2-5 Definition of the Pins in the GW1NS series of FPGA products .......... 7 Table 3-1 Other Pins in GW1NS-2/GW1NS-2C QN32 ..............11 Table 3-2 Other pins in GW1NS-2/GW1NS-2C QN32U ..............
  • Page 8: About This Guide

    1 About This Guide 1.1 Purpose About This Guide 1.1 Purpose This manual contains an introduction to the GW1NS series of FPGA products together with a definition of the pins, list of pin numbers, distribution of pins, and package diagrams. 1.2 Related Documents The latest user guides are available on GOWINSEMI Website.
  • Page 9: Abbreviations And Terminology

    LQ144 LQFP144 package MG64 MBGA64 1.4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly using the information provided below. Website: www.gowinsemi.com E-mail: support@gowinsemi.com UG823-1.7.2E...
  • Page 10: Overview

    Internet of Things, servo drive, consumption fields, etc. 2.1 PB-Free Package The GW1NS series of FPGA products are PB free in line with the EU ROHS environmental directives. The substances used in the GW1NS series of FPGA products are in full compliance with the IPC-1752 standards.
  • Page 11: Package And Max. User I/O Information

    2 Overview 2.2 Package and Max. User I/O Information 2.2 Package and Max. User I/O Information Table 2-1 Package and Max. User I/O Information Package Pitch(mm) Size(mm) GW1NS-2 GW1NS-2C GW1NS-4/GW1NS-4C – QN32 5 x 5 25(4) 25(4) – QN32U 5 x 5 16(2) 16(2) –...
  • Page 12: Pin Quantity

    2 Overview 2.4 Pin Quantity 2.4 Pin Quantity 2.4.1 Quantity of GW1NS-2 / GW1NS-2C Pins Table 2-3 Quantity of GW1NS-2 / GW1NS-2C Pins GW1NS-2/GW1NS-2C Pin Type CS36U QN32 QN32U CS36 QN48 LQ144 (GW1NS-2) BANK0 4/1/0 3/0/0 10/5/0 6/3/0 11/5/0 32/14/0 I/O Single BANK1 9/4/2...
  • Page 13: Quantity Of Gw1Ns-4 / Gw1Ns-4C Pins

    2 Overview 2.4 Pin Quantity  [2]The max. user I/O excludes dedicated MODE pins. The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The data in this table is when the loaded four JTAG pins (TCK, TDI, TDO, and TMS) are used as I/O. ...
  • Page 14: Pin Definitions

    Table 2-5 provides a detailed overview of user I/O, multi-function pins, dedicated pins, and other pins. Table 2-5 Definition of the Pins in the GW1NS series of FPGA products Pin Name Description User I/O Pins...
  • Page 15 2 Overview 2.5 Pin Definitions Pin Name Description Data port D1 in CPU mode MISO in MSPI mode: Master data output/Slave SI /D2 data input Data port D2 in CPU mode I, internal weak Serial mode input in JTAG mode pull-up Serial clock input in JTAG mode, which needs to be connected with 4.7 K drop-down resistance on...
  • Page 16: Introduction To The I/O Bank

    I/O BANK2 This manual provides an overview of the distribution view of the pins in the GW1NS series of FPGA products. The four I/O Banks of the GW1NS series of FPGA products are marked with four different colors. User I/O, power, and ground are also marked with different symbols and colors.
  • Page 17 2 Overview 2.6 Introduction to the I/O BANK ” ” denotes VCC. The filling color does not change.  ” ” denotes VSS. The filling color does not change.  ” ” denotes NC.  UG823-1.7.2E 10(28)
  • Page 18: View Of Pin Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.1 View of QN32 Pins Distribution Figure 3-1 View of GW1NS-2/ GW1NS-2C QN32 Pins Distribution (Top View) Table 3-1 Other Pins in GW1NS-2/GW1NS-2C QN32 VCCO0 VCCO2 VCC/VCCPLL...
  • Page 19: View Of Qn32U Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.2 View of QN32U Pins Distribution Figure 3-2 View of GW1NS-2/GW1NS-2C QN32 Pins Distribution (Top View) Table 3-2 Other pins in GW1NS-2/GW1NS-2C QN32U VCCO0/VDDA 19, 23 VCCO2 VCCO3 VCC/VDDPL/VCCPLL 2, 18, 7 VBUSPAD/VCCO1/VCCX/VDDAUSB/ 11, 15...
  • Page 20: View Of Cs36 Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.3 View of CS36 Pins Distribution Figure 3-3 View of GW1NS-2/GW1NS-2C CS36 Pin Distribution (Top View) Table 3-3 Other pins in GW1NS-2/GW1NS-2C CS36 VCCO1/VCCO3 VCCO2 VCCX/VCCP VCC/VCCPLL VDDA/VCCO0 UG823-1.7.2E 13(28)
  • Page 21: View Of Cs36U Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.4 View of CS36U Pins Distribution (GW1NS-2) Figure 3-4 View of GW1NS-2 CS36U Pins Distribution (Top View) Table 3-4 Other pins in GW1NS-2 CS36U VCCO2 VCCO3 VCCX/VCCO1/VDDAUSB/VDDDUSB VCC/VCCPLL/VDDPL VSS/AGND VCCO0 UG823-1.7.2E 14(28)
  • Page 22: View Of Qn48 Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.5 View of QN48 Pins Distribution Figure 3-5 View of GW1NS-2/GW1NS-2C QN48 Pins Distribution (Top View) Table 3-5 Other pins in GW1NS-2/GW1NS-2C QN48 VCCO1 VCCO2 VCCX/VCCP 8, 36 VCC/VCCPLL 12, 37 VDDA/VCCO0/VCCO3 2, 26...
  • Page 23: View Of Lq144Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NS-2/GW1NS-2C Pins Distribution 3.1.6 View of LQ144Pins Distribution Figure 3-6 View of GW1NS-2/GW1NS-2C LQ144 Pins Distribution (Top View) Table 3-6 Other pins in GW1NS-2/GW1NS-2C LQ144 VDDA/VCCO0 109, 127, 144 VCCO1 VCCO2 37, 55 VCCO3 5, 26 VCCX/VDDAUSB...
  • Page 24: View Of Gw1Ns-4/Gw1Ns-4C Pins Distribution

    3 View of Pin Distribution 3.2 View of GW1NS-4/GW1NS-4C Pins Distribution 3.2 View of GW1NS-4/GW1NS-4C Pins Distribution 3.2.1 View of CS49 Pins Distribution Figure 3-7 View of GW1NS-4/ GW1NS-4C CS49 Pins Distribution (Top View) Table 3-7 Other pins in GW1NS-4/GW1NS-4C CS49 VCCO1 VCCO2 VCCX...
  • Page 25: View Of Qn48 Pins Distribution

    3 View of Pin Distribution 3.2 View of GW1NS-4/GW1NS-4C Pins Distribution 3.2.2 View of QN48 Pins Distribution Figure 3-8 View of GW1NS-4/ GW1NS-4C QN48 Pins Distribution (Top View) Table 3-8 Other pins in GW1NS-4/GW1NS-4C QN48 11,37 VCCO0 VCCO1 VCCO2 VCCO3 12,24 VCCX UG823-1.7.2E...
  • Page 26: View Of Mg64 Pins Distribution

    3 View of Pin Distribution 3.2 View of GW1NS-4/GW1NS-4C Pins Distribution 3.2.3 View of MG64 Pins Distribution Figure 3-9 View of GW1NS-4/ GW1NS-4C MG64 Pins Distribution (Top View) Table 3-9 Other pins in GW1NS-4/GW1NS-4C MG64 VCCO0 VCCO1 VCCO2 VCCO3 VCCX D4,E5 UG823-1.7.2E 19(28)
  • Page 27: Package Diagrams

    4 Package Diagrams 4.1 QN32 Package Outline (5mm x 5mm) Package Diagrams 4.1 QN32 Package Outline (5mm x 5mm) Figure 4-1 Package Outline QN32 UG823-1.7.2E 20(28)
  • Page 28: Qn32U Package Outline (5Mm X 5Mm)

    4 Package Diagrams 4.2 QN32U Package Outline (5mm x 5mm) 4.2 QN32U Package Outline (5mm x 5mm) Figure 4-2 Package Outline QN32U UG823-1.7.2E 21(28)
  • Page 29: Cs36 Package Outline (2.5Mm X 2.5Mm)

    4 Package Diagrams 4.3 CS36 Package Outline (2.5mm x 2.5mm) 4.3 CS36 Package Outline (2.5mm x 2.5mm) Figure 4-3 Package Outline CS36 UG823-1.7.2E 22(28)
  • Page 30: Cs36U Package Outline (2.5Mm X 2.5Mm)

    4 Package Diagrams 4.4 CS36U Package Outline (2.5mm x 2.5mm) 4.4 CS36U Package Outline (2.5mm x 2.5mm) Figure 4-4 Package Outline CS36U UG823-1.7.2E 23(28)
  • Page 31: Cs49 Package Outline (2.9Mm X 2.9Mm)

    4 Package Diagrams 4.5 CS49 Package Outline (2.9mm x 2.9mm) 4.5 CS49 Package Outline (2.9mm x 2.9mm) Figure 4-5 Package Outline CS49 UG823-1.7.2E 24(28)
  • Page 32: Qn48Package Outline (Gw1Ns-2 / Gw1Ns-2C, 6Mm X 6Mm)

    4.6 QN48Package Outline (GW1NS-2 / GW1NS-2C, 4 Package Diagrams 6mm x 6mm) 4.6 QN48Package Outline (GW1NS-2 / GW1NS-2C, 6mm x 6mm) Figure 4-6 Package Outline QN48 (GW1NS-2 / GW1NS-2C) EXPOSED THERMAL PAD ZONE BOTTOM VIEW MILLIMETER SYMBOL 0.70 0.80 0.05 0.15 0.25 0.20...
  • Page 33: Qn48Package Outline (Gw1Ns-4 / Gw1Ns-4C, 6Msm X 6Mm)

    4.7 QN48Package Outline (GW1NS-4 / GW1NS-4C, 4 Package Diagrams 6msm x 6mm) 4.7 QN48Package Outline (GW1NS-4 / GW1NS-4C, 6msm x 6mm) Figure 4-7 Package Outline QN48 (GW1NS-4 / GW1NS-4C) EXPOSED THERMAL PAD ZONE BOTTOM VIEW MILLIMETER SYMBOL 0.75 0.85 0.05 0.15 0.25 0.20...
  • Page 34: Lq144 Package Outline (22Mm X 22Mm)

    4 Package Diagrams 4.8 LQ144 Package Outline (22mm x 22mm) 4.8 LQ144 Package Outline (22mm x 22mm) Figure 4-8 LQ144 Package Outline UG823-1.7.2E 27(28)
  • Page 35: Mg64 Package Outline (4.2Mm X 4.2Mm)

    4 Package Diagrams 4.9 MG64 Package Outline (4.2mm x 4.2mm) 4.9 MG64 Package Outline (4.2mm x 4.2mm) Figure 4-9 MG64 Package Outline 1 2 3 4 5 6 7 8 UG823-1.7.2E 28(28)

This manual is also suitable for:

Gw1ns-2Gw1ns-2cGw1ns-4Gw1ns-4c

Table of Contents