Contents Contents Contents ....................... i List of Figures ....................iii List of Tables ...................... iv 1 About This Guide ..................1 1.1 Purpose .......................... 1 1.2 Supported Products ......................1 1.3 Related Documents ......................1 1.4 Terminology and Abbreviations..................2 1.5 Support and Feedback ....................
List of Figures List of Figures Figure 2-1 DK-GoAI-GW2A55PBGA484_V1.0 Development Board ..........4 Figure 2-2 A Development Kit......................5 Figure 2-3 PCB Components ......................6 Figure 2-4 System Block Diagram ....................7 Figure 3-1 FPGA USB Download Diagram ..................12 Figure 3-2 Power System Distribution ....................14 Figure 3-3 Clock, Reset ........................16 Figure 3-4 LED Circuit ........................17 Figure 3-5 FPC Circuit ........................19...
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List of Tables List of Tables Table 1-1 Terminology and Abbreviations ..................2 Table 2-1 Development Board Description ..................9 Table 3-1 FPGA Download Pinout ....................12 Table 3-2 FPGA Power Pinout ......................15 Table 3-3 FPGA Clock and Reset Pinout ..................16 Table 3-4 LED Pinout ........................17 Table 3-5 GPIO Pinout ........................18 Table 3-6 FPC Pinout ........................20 Table 3-7 HDMI_TX Pinout ......................22...
You can find the related documents at www.gowinsemi.com: 1. DS102, GW2A series of FPGA Products Data Sheet 2. UG111, GW2A series of FPGAProducts Package and Pinout Manual 3. UG113, GW2A-55 Pinout 4. UG290, Gowin FPGAProducts Programming and Configuration Manual 5. SUG100, Gowin Software User Guide DBUG378-1.0E...
1 About This Guide 1.4 Terminology and Abbreviations 1.4 Terminology and Abbreviations The terminology and abbreviations used in this manual are as shown in Table 1-1. Table 1-1 Terminology and Abbreviations Terminology and Abbreviations Meaning FPGA Field Programmable Gate Array System in Package SDRAM Synchronous Dynamic RAM...
1 About This Guide 1.5 Support and Feedback 1.5 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly by the following ways. Website: www.gowinsemi.com...
2 Introduction 2.1 Overview Introduction 2.1 Overview Figure 2-1 DK-GoAI-GW2A55PBGA484_V1.0 Development Board The board uses GW2A55 FPGA device embedded with B-SRAM, DSP, PLL and on chip oscillator. The GW2A series of FPGA products are the first generation of the Arora family. The GW2A series provide high-performance DSP resources, high-speed LVDS interfaces, and abundant BSRAM resources.
The development board kit includes the following items: DK-GoAI-GW2A55PBGA484_V1.0 development board USB Cable 5V Adaptor Quick Start Guide Figure 2-2 A Development Kit Gowin DK-GoAI-GW2A55PBGA484_V1.0 ① Development Board 5V Power Supply ② USB Mini-B Download Cable ③ Quick Start User Manual ④ DBUG378-1.0E...
2 Introduction 2.5 Features 2.5 Features The features of the development board are as follows: FPGA PBGA484 Up to 319 user I/O Abundant LUT4 resources Multiple modes and capacities of B-SRAM FPGA Configuration Modes MSPI JTAG Clock resource 27MHz Clock Crystal Oscillator ...
of Tables List 2.6 Development Board Description Table 2-1 Development Board Description Name Functional Description Conditions Remarks FPGA Core chip – – USB interface; MSPI Download USB to JTAG chip integrated on board – supported Input power: 5V Provide power for FPGA, download, ...
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2 Introduction 2.6 Development Board Description Name Functional Description Conditions Remarks protection; anodes of power interface; HDMI interface 2A self-recovery fuses are with ESD connected at power input protection. HDMI interface with ESD protection: ±15kV non-contact discharge and ± 8kV contact discharge;...
3 Development Board Circuit 3.1 FPGA Module Development Board Circuit 3.1 FPGA Module Overview For the resources of GW2A series of FPGA Products, see DS102, GW2A series of FPGA Products Data Sheet. I/O BANK Introduction For the I/O BANK, package and pinout information, see UG111, GW2A series of FPGAProducts Package and Pinout Manual for more details.
3 Development Board Circuit 3.2 Download 3.2.2 USB Download Circuit Figure 3-1 FPGA USB Download Diagram F_TMS USB_D+ F_TCK USB_D- USB to JTAG F_TDI Chip GW2A- F_TDO LV55PG484 3.2.3 Download Flow 1. FPGA SRAM Download Mode: Plug the USB cable to the USB interface (J7) on the development board.
3 Development Board Circuit 3.3 Power Supply 3.3 Power Supply 3.3.1 Overview DC5V is input by J6. The PAM2306AYPAA and TPS7A7001 power supply chip are used to step down voltage from 5V to 3.3V, 2.8V, 2.5V, 1.8V, 1.2V and 1.0V, which can meet the power demands of the development board.
3 Development Board Circuit 3.3 Power Supply 3.3.2 Power System Distribution Figure 3-2 Power System Distribution HDMI DC5V input USB to JTAG (FT2232) LED&GPIO PAM2306AYPA DC-DC 3.3V FPGA&Flash 27Mhz clock&reset PAM2306AYPA DC-DC FPC connector 2.8V HDMI&FPC connector PAM2306AYPA DC-DC 2.5V FPGA PAM2306AYPA FPGA&Microphone...
3 Development Board Circuit 3.4 Clock, Reset 3.3.3 FPGA Power Pinout Table 3-2 FPGA Power Pinout Name Pin No. BANK Description I/O Level VCCO0 F11, B5, B110 I/O Bank Voltage 3.3V VCCO1 B19, F12、B14 I/O Bank Voltage 2.5V VCCO2 K21, E21, L17 I/O Bank Voltage 3.3V VCCO3...
3 Development Board Circuit 3.6 GPIO 3.6 GPIO 3.6.1 Overview Eight GPIOs are reserved on development board for user extension and test. 3.6.2 Pinout Table 3-5 GPIO Pinout Name Pin No. BANK I/O Level F_GPIO0 3.3V F_GPIO1 3.3V F_GPIO2 3.3V F_GPIO3 3.3V F_GPIO4...
3 Development Board Circuit 3.7 FPC Connector 3.7.3 Pinout Table 3-6 FPC Pinout Socket Pin No. Name Pin No. BANK Description I/O Level STROBE Flash control signal AA11 SCCB serial interface data 2.5V AVDD Analog signal power 2.8V AB11 SCCB serial interface clock 2.5V RST_N Reset signal...
3 Development Board Circuit 3.8 HDMI 3.8 HDMI 3.8.1 Overview To facilitate you to input images to FPGA and FPAG to output images, one HDMI RX interface and one HDMI TX interface are reserved. 3.8.2 HDMI Circuit Figure 3-6 HDMI Connection Diagram HDMI_TXCP HDMI_TXCN HDMI_TX0P...
4 Notes Notes Notes for the Use of the Development Board 1. Handle with care and pay attention to electrostatic protection. 2. GW2AR-18 device receives and transmits HDMI signals in 2.5V. 3. HDMI hot plug signal line is not connected to the GW2AR-55device. 4.
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