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GOWIN GW1NRF Series User Manual

Bluetooth fpga products
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GW1NRF series of Bluetooth FPGA Products
Package and Pinout User Guide
UG893-1.0E, 11/12/2019

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Summary of Contents for GOWIN GW1NRF Series

  • Page 1 GW1NRF series of Bluetooth FPGA Products Package and Pinout User Guide UG893-1.0E, 11/12/2019...
  • Page 2 Copyright©2019 Guangdong Gowin Semiconductor Corporation. All Rights Reserved. No part of this document may be reproduced or transmitted in any form or by any denotes, electronic, mechanical, photocopying, recording or otherwise, without the prior written consent of GOWINSEMI. Disclaimer ®...
  • Page 3 Revision History Date Version Description 11/12/2019 1.0E Initial version published.

  • Page 4: Table Of Contents

    Contents Contents Contents ......................... i List of Figures ..................... ii List of Tables ...................... iii 1 About This Guide ..................... 1 1.1 Purpose ..........................1 1.2 Related Documents ......................1 1.3 Terminology and Abbreviations ................... 1 1.4 Support and Feedback ....................... 2 2 Overview ......................

  • Page 5: List Of Figures

    List of Figures List of Figures Figure 2-1GW1NRF series of Bluetooth FPGA products I/O Bank Distribution ........ 7 Figure 3-1 View of GW1NRF-4B QN48 Pins Distribution (Top View) ..........9 Figure 3-2 View of GW1NRF-4B QN48E Pins Distribution (Top View) ..........10 Figure 4-1 Package Outline QN48 .....................
  • Page 6 Table 2-2 Other Pins in the GW1NRF Series ..................4 Table 2-3 Quantity of GW1NRF-4BPins ..................... 4 Table 2-4 Definition of the Pins in the GW1NRF series of Bluetooth FPGA products ....... 5 Table 3-1 Other pins in GW1NRF-4B QN48 ..................9 Table 3-2 Other pins in GW1NRF-4B QN48 ..................

  • Page 7: About This Guide

    1About This Guide 1.1Purpose About This Guide 1.1 Purpose This manual contains an introduction to the GW1NRF series of Bluetooth FPGA products together with a definition of the pins, list of pin numbers, distribution of pins, and package diagrams. 1.2 Related Documents The latest user guides are available on the GOWINSEMI Website.

  • Page 8: Support And Feedback

    1About This Guide 1.4Support and Feedback 1.4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly by the following ways. Website: www.gowinsemi.com.cn E-mail: support@gowinsemi.com UG893-1.0E...

  • Page 9: Overview

    2.1 PB-Free Package The GW1NRF series of Bluetooth FPGA products are PB free in line with the EU ROHS environmental directives. The substances used in the GW1NRF series of Bluetooth FPGA products are in full compliance with the IPC-1752 standards.

  • Page 10: Power Pin

    2Overview 2.3Power Pin 2.3 Power Pin Table 2-2 Other Pins in the GW1NRF Series VCCO0 VCCO1 VCCO2 VCCO3 VCCX 2.4 Pin Quantity 2.4.1 Quantity of GW1NRF-4B Pins Table 2-3 Quantity of GW1NRF-4BPins GW1NRF-4B Pin Type QN48 QN48E BANK0 9/4/0 9/4/0...

  • Page 11: Pin Definitions

    Table 2-4 provides a detailed overview of user I/O, multi-function pins, dedicated pins, and other pins. Table 2-4 Definition of the Pins in the GW1NRF series of Bluetooth FPGA products Pin Name Description Max.
  • Page 12 2Overview 2.5 Pin Definitions Pin Name Description output Data port D1 in CPU mode MISO in MSPI mode: Master data output/Slave SI /D2 data input Data port D2 in CPU mode I, internal weak Serial mode input in JTAG mode pull-up Serial clock input in JTAG mode, which needs to be connected with 4.7 K drop-down resistance on...

  • Page 13: I/O Bank Introduction

    2Overview 2.6 I/O BANK Introduction 2.6 I/O BANK Introduction There are four I/O Banks in the GW1NRF series of FPGA products. The I/O BANK Distribution of the GW1NRF series of Bluetooth FPGA products is as shown in Figure 2-1. Figure 2-1GW1NRF series of Bluetooth FPGA products I/O Bank Distribution...

  • Page 14: View Of Pin Distribution

    3View of Pin Distribution 2.6 I/O BANK Introduction View of Pin Distribution UG893-1.0E 8(12)

  • Page 15: View Of Gw1Nrf-4B Pins Distribution

    3View of Pin Distribution 3.1 View of GW1NRF-4B Pins Distribution 3.1 View of GW1NRF-4B Pins Distribution 3.1.1 View of QN48 Pins Distribution Figure 3-1 View of GW1NRF-4B QN48 Pins Distribution (Top View) Table 3-1 Other pins in GW1NRF-4B QN48 11,37 VCCX VCCO0/VCCO3 VCCO1/VCCO2...

  • Page 16: View Of Qn48E Pins Distribution

    3View of Pin Distribution 3.1 View of GW1NRF-4B Pins Distribution 3.1.2 View of QN48E Pins Distribution Figure 3-2 View of GW1NRF-4B QN48E Pins Distribution (Top View) Table 3-2 Other pins in GW1NRF-4B QN48 11,37 VCCX VCCO0/VCCO3 VCCO1/VCCO2 UG893-1.0E 10(12)

  • Page 17: Package Diagrams

    4Package Diagrams Package Diagrams UG893-1.0E 11(12)

  • Page 18: Qn48 Package Outline (6Mm X 6Mm)

    4Package Diagrams 4.1 QN48 Package Outline (6mm x 6mm) 4.1 QN48 Package Outline (6mm x 6mm) Figure 4-1 Package Outline QN48 EXPOSED THERMAL PAD ZONE BOTTOM VIEW MILLIMETER SYMBOL 0.75 0.85 0.05 0.15 0.25 0.20 0.18 0.23 0.20 5.90 6.00 6.10 4.10 4.20...

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