Buffer Memory Configuration - LG MASTER-K Series User Manual

Programmable logic controller
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Chapter 6. BUFFER MEMORY AND I/O SIGNAL CONFIGURATON

6.3 Buffer memory configuration

The high speed counting module has a Buffer Memory for data write/read to/from the PLC CPU. The
PUT and PUTP instructions write data from the PLC CPU to the Buffer Memory. The GET and GETP
instruction reads data. (Refer to the Manuals relating to the instructions.)
The followings explain the structure of the Buffer Memory and the data configuration.
6.3.1
Buffer memory configuration
▶ G3F-HSCA Buffer Memory
Address
(Decimal
)
Preset Value(Lower)
0000
Preset Value(Upper)
0001
0002
0003
0004
0005
0006
▶ G4F-HSCA / G6F-HSCA Buffer Memory
Address
(Decimal
)
Preset Value(Lower)
0000
0001
Preset Value(Upper)
0002
0003
0004
0005
0006
Set Value(Lower)
Channel
Set Value(Upper)
Out Data
Current Value
(Lower)
Current Value
Set Value(Lower)
Channel
Set Value(Upper)
Out Data
Current Value
(Lower)
Current Value
Address
(Decimal
)
Preset Value(Lower)
0010
Preset Value(Upper)
0011
0012
0013
0
0014
0015
0016
0
6 - 8
Set Value(Lower)
Channel
Set Value(Upper)
Out Data
Current Value
(Lower)
Current Value
1

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