Xycom XVME-560 Manual page 55

XVME-560 Manual
September, 1984
Table B-l. Pl - VMEbus Signal Identification (cont'd)
Connector
Signal
Pin Number
Mnemonic
DTACK* 1A: 16
D00-D15
1A: l-8
lC: l-8
GND
1A: 9,ll,
1B: 20,23
1C:
2B: 2,12
1A: 20
IACK*
IB: 24-30
IRQ l*-
IRQ7*
1C: 13
LWORD*
2B: 3
(RESERVED
1B: 21
SERCLK
1B: 22
SERDAT
and
DATA TRANSFER ACKNOWLEDGE - Open-
collector driven signal generated by a DTB slave.
The falling edge of this signal indicates that valid
data is available on the data bus during a read
cycle, or that data has been accepted from the
data bus during a write cycle.
DATA BUS (bits 0-15) - Three-state driven bi-
directional data lines that provide a data path
between the DTB master and slave.
GROUND
15,17,19
9
22,31
INTERRUPT ACKNOWLEDGE - Open-coliector or
three-state
sing an interrupt request.
plane
Slot l. IACKIIN*
daisy-chain.
INTERRUPT REQUEST (l-7) - Open-collector dri-
ven signals, generated by an interrupter, which
carry prioritized interrupt requests. Level seven is
the highest priority.
LONGWORD -
cate that the current transfer is a 32-bit transfer.
RESERVED - Signal line reserved for future
VMEbus enhancements. This line must not be used.
A reserved signal which will be used as the clock
for a serial communication bus protocol which is
still being finalized.
A reserved signal which will be used as the
transmission line for serial communication bus
messages.
Signal Name and Description
driven signal from any Master proces-
to Siot 1, where is
it
to start the interrupt acknowledge
Three-state driven signal to indi-
B-3
via the
Routed back-
looped
back to become