Xycom XVME-560 Manual page 31

XVME-560 Manual
September, 1984
3.4.1 Control Register Bit Definitions
D 7 A logic 1 written to D7 will force a conversion.
These two bits provide the "mode code** specifying the desired
D6,D5:
operating mode as shown in Table 3-1 below.
These conversion modes are described in
D4: This bit is a software module reset. If this is set to a logic "1" and
then to a
Control/Status register.
minimum of 25
This bit enables interrupts when set to a logic " 1 " .
D 3
l
l
D2 Not used.
l
These bits control
Dl,D0:
red and green
The LEDs
by the XYCOM architecture (described in Appendix
The AIN is a non-intelligent module so all diagnostics must be
performed by the system host.
(Write base+8lH)
Mode Bits
Mode 1 Mode 0
0 0
1
0
1 0
1 1
"0", the module will
logic
usec.
the red
LEDs
turns on
A logic
" 0 "
0
A logic "1" turns on
0
will indicate the following
Green
Red
OFF O F F
OFF O N
ON O F F
ON O N
Table 3-l. Mode Bits
A/D Conversion Mode
Single Channel
Sequential Channel
Random Channel
External Trigger
The A/D converter is not reset, so a
must a
pass before
(SYSFAIL) and green (PASS)
visual indication of
provide
the Red LED
the Green LED (Dl)
status (Table 3-2)
Table 3-2.
LED
Module
Not
Passed
Power-up/failed diagnostics
Undergoing
NOTE
3-4
detail in Section 3.5.
reset except for
be
can be started.
conversion
a module status.
(D0)
as
A).
Status
operational
diagnostics
diagnostics
the
LEDs. The
set forth