Digital Timer - Pacific Research BMX-III-18 Operation And Technical Manual

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BMX SERIES III CONSOLE
8.2.3 DT-4 Digital Timer
The DT-4 is a five-digit (minutes, seconds, tenths-of-a-second) digital timer which is controlled by either
the Timer Control Panel (PR&E #99-220) or the console timer reset bus. The Timer Control Panel is located
in the lower far right console position. See Section 3.15 for instruction in operating the timer.
DIGITIMER
DT-4
PACIFIC RESEARCH & ENGINEERING CORP.
FIGURE 8.3 DT-4 DIGITAL TIMER
NOTE: Three five-pin timer reset Molex connectors are provided at the rear of the mainframe for
connection to external timers, if desired.
CIRCUITRY
The DT-4 is designed around MK50397 timer integrated circuit U4. The time base and display multiplex
frequency is provided by crystal oscillator/divider circuit Y1 and U1. The segments of displays DS1
through DS5 are driven by transistors Q1 through Q7, while the digits are selected by transistors Q8 through
Q12.
Power-up circuit R13, CR1 and C9 resets U4 to zero, and sets start/stop flip-flop U2A and U2C so that
the NOT RUN line is high. An external START command causes the flip-flop to change state to the RUN
condition. An external STOP command via U2C will set the flip-flop back to the STOP condition. An
external RESET command via U2B will reset U4 to zero. An external HOLD command via U3D will
momentarily hold the display at the present time count, while the real time count continues internally.
A READ or RUN command is routed via U3C, U3B and U3A to enable the tenth of second display, and,
via Q13, to turn on the decimal point. Strapping J1 pin E to J1 pin F continuously enables both the tenth
of second display and decimal point. A BLANK command to U4 allows the entire display to be blanked.
NOTE: In some cases it may be desirable to disable the tenth of second and decimal point indicators. This
can be accomplished by cutting the strap between pins E and F (.1 SEC LOCK) on the timer connector.
REVISION B
205
PACIFIC RESEARCH & ENGINEERING

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