Address Map - NEC V850E/MA1 Application Note

3.5 Address Map

The address maps of the CPU memory space and PCI bus I/O or memory space are shown below.
Figure 3-3. CPU Memory Space/PCI Bus I/O Space Address Map
I_CPU_CS1_B area
Figure 3-4. CPU Memory Space/PCI Bus Memory Space Address Map
FFFFFH
I_CPU_CS2_B area
00000H
O_SD_CS_B output
when accessing from
PCI host bridge
44
CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
CPU memory space
FFFFH
PCI I/O area
64 KB
0000H
CPU memory space PCI bus memory space
PCI memory area
1 MB
Main memory
(SDRAM) area
Application Note U17121EJ1V1AN
PCI bus I/O space
PCI bus I/O space
64 KB
FFFF FFFFH
M_BASE[31:16] + FFFFFH
PCI memory space
1 MB
M_BASE[31:16] + 00000H
S_BASE[31:16] + S_RANGE[31:16] + FFFFH
Main memory space
S_BASE[31:16] + S_RANGE[31:16] + 0000H
0000 0000H
FFFF FFFFH
IO_BASE[31:16] + FFFFH
IO_BASE[31:16] + 0000H
0000 0000H