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CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
(b) Memory single write cycle
Timing type: Memory single write cycle
PCICLK
REQ#
GNT#
AD
FRAME#
IRDY#
DEVSEL#
TRDY#
STOP#
(c) Burst read cycle
Timing type: Memory burst read cycle − Not disconnect
PCICLK
REQ#
GNT#
AD
FRAME#
IRDY#
DEVSEL#
TRDY#
H
STOP#
Figure 3-17. Single Write Cycle
Figure 3-18. Burst Read Cycle
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Application Note U17121EJ1V1AN
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