V850E/Me2 Pci Host Bridge Macro Initialization Sample Program List - NEC V850E/MA1 Application Note

5.5.3 V850E/ME2 PCI host bridge macro initialization sample program list

/////////////////////////////////////////////////////////////////
// V850E/ME2 - PCI Host Bridge Macro initialization sample
// Overview: Initializes PCI Host Bridge Macro by setting
// PCI Bridge IO area register group.
// Specific initialization is described in
// function PCI_HBM_Init().
//
// PCI_HBM_Init() is called after functions required for
// accessing Host Bridge Macro, such as CPU and peripheral
// I/O, are initialized.
//
/////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////
// Defines base address of PCI area and SDRAM area.
// Start address of PCI area is 0C80_0000H, and start address //
// of SDRAM area is 0400_0000H in this application.
/////////////////////////////////////////////////////////////////
#define BASE_ADDRESS_ME2PCIIF
#define BASE_ADDRESS_PCI_IO
#define BASE_ADDRESS_PCI_BRIDGE_IO
#define BASE_ADDRESS_PCI_MEM
#define BASE_ADDRESS_SDRAM
#define RANGE_SDRAM
////////////////////////////////////////////////////////
// PCI Host Bridge Macro register address definition //
////////////////////////////////////////////////////////
#define PHBMR_PCI_CONFIG_DATA
#define PHBMR_PCI_CONFIG_ADD
#define PHBMR_PCI_CONTROL
#define PHBMR_PCI_IO_BASE
#define PHBMR_PCI_MEM_BASE
#define PHBMR_PCI_INT_CTL
#define PHBMR_PCI_ERR_ADD
#define PHBMR_SYSTEM_MEM_BASE
#define PHBMR_SYSTEM_MEM_RANGE
#define PHBMR_SDRAM_CTL
///////////////////////////////////////////
// Macro definition for register access //
///////////////////////////////////////////
#define V850EME2_REGW(x)
CHAPTER 5 APPLICATION EXAMPLES
(0x0C800000)
(BASE_ADDRESS_ME2PCIIF)
(BASE_ADDRESS_ME2PCIIF + 0x00200000)
(BASE_ADDRESS_ME2PCIIF + 0x00400000)
(0x04000000)
(0x03FFFFFF)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x00)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x04)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x08)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x10)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x14)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x18)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x1C)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x40)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x44)
(BASE_ADDRESS_PCI_BRIDGE_IO+0x48)
*((volatile unsigned int *)((int)x))
Application Note U17121EJ1V1AN
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