ZiLOG Z8 Series User Manual page 168

Add With Carry
Syntax
ADC dst, src
Instruction Format
OPC
OPC
OPC
Operation
dst ← dst + src + C
The source operand, along with the setting of the Carry (C) Flag, is added to the destina-
tion operand. Two's complement addition is performed. The sum is stored in the destina-
tion operand. The contents of the source operand are not affected. In multiple precision
arithmetic, this instruction permits the carry from the addition of low order operands to be
carried into the addition of high order operands.
Flag
C
Z
S
V
D
H
Note: Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the
source or destination Working Register operand is specified by adding
high nibble of the operand. For example, if Working Register R12 (CH) is the destination
operand, then
UM001604-0108
dst src
src dst
dst src
Description
Set if there is a carry from the most significant bit of the result; cleared otherwise.
Set if the result is zero; cleared otherwise.
Set if the result is negative; cleared otherwise.
Set if an arithmetic overflow occurs, that is, if both operands are of the same sign
and the result is of the opposite sign; cleared otherwise.
Always cleared.
Set if there is a carry from the most significant bit of the low order four bits of the
result; cleared otherwise.
is used as the destination operand in the Op Code.
ECh
Address
Mode
OPC
Cycles (Hex) dst
6 02 r
6 03 r
10 04 R
10 05 R
10 06 R
10 07 IR
®
Z8 CPU
User Manual
src
r
lr
R
IR
IM
IM
( ) to the
1110b Eh
Instruction Description
161