Reset; Flash - Espressif Systems ESP32-C3 Series Hardware Design Manuallines

2 Schematic Checklist
VDDA,
VDD3P3,
VDD3P3_RTC,
VDD3P3_CPU
CHIP_PU
Table 1: Description of ESP32­C3 Family Power­up and Reset Timing Parameters
Parameter Description
Time between bringing up the VDDA, VDD3P3, VDD3P3_RTC, and
t
0
VDD3P3_CPU rails, and activating CHIP_PU
t Duration of CHIP_PU signal level < V
1
Notice:
To ensure the power supply to the ESP32-C3 family chip is stable during power-up, it is advised to add an
RC delay circuit at the CHIP_EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ
and C = 1 µF. However, specific parameters should be adjusted based on the power-up timing of the power
supply and the power-up and reset sequence timing of the chip.

2.2.2 Reset

CHIP_EN can be used as the reset pin of ESP32-C3 family. When CHIP_EN is at low level, the reset voltage
(V ) should be (–0.3
IL_nRST
To avoid reboots caused by external interference, route the CHIP_EN trace as short as possible, and add a
pull-up resistor as well as a capacitor to ground whenever possible.
Notice:
CHIP_EN pin must not be left floating.

2.3 Flash

ESP32-C3 family can support up to 16 MB external flash. The ESP32-C3-WROOM-1 module uses a 4 MB SPI
flash, powered by VDD_SPI. We recommend reserving a serial resistor (initially of 0 Ω) on the SPI line, to lower the
driving current, adjust timing, reduce crosstalk and external interference, etc.
Espressif Systems
t 0
2.8 V
V
IL_nRST
Figure 4: ESP32­C3 Family Power­up and Reset Timing
~ 0.25 × VDD) V (where VDD is the I/O voltage for a particular power domain of pins).
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t 1
to reset the chip
IL_nRST
8
ESP32-C3 Family Hardware Design Guidelines V0.5
Min
(µs)
50
50