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Espressif Systems ESP32-C6 Series Hardware Design Manuallines

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ESP32-C6 Series
Hardware Design Guidelines
Introduction
Hardware design guidelines give advice on how to integrate ESP32-C6 into other products.
ESP32-C6 is a series of ultra-low-power SoCs with support for 2.4 GHz Wi-Fi 6 (802.11 ax),
®
Bluetooth
5 (LE), Zigbee and Thread (802.15.4).
These guidelines will help to ensure optimal performance of your product with respect to tech-
nical accuracy and conformity to Espressif's standards.
www.espressif.com
Version 1.0
Espressif Systems
Copyright © 2023

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Summary of Contents for Espressif Systems ESP32-C6 Series

  • Page 1 ESP32-C6 Series Hardware Design Guidelines Introduction Hardware design guidelines give advice on how to integrate ESP32-C6 into other products. ESP32-C6 is a series of ultra-low-power SoCs with support for 2.4 GHz Wi-Fi 6 (802.11 ax), ® Bluetooth 5 (LE), Zigbee and Thread (802.15.4).

  • Page 2: Table Of Contents

    EVM is relatively poor. 3.10.4 Q: TX performance is not bad, but the RX sensitivity is low. Hardware Development ESP32-C6 Modules ESP32-C6 Development Boards Download Instructions Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 3 Contents Related Documentation and Resources Glossary Revision History Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 4 ESP32-C6 Crystal Layout ESP32-C6 RF Layout in a Four-layer PCB Design ESP32-C6 PCB Stack up Design ESP32-C6 Stub in a Four-layer PCB Design ESP32-C6 Flash Layout ESP32-C6 UART0 Layout Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 5: Overview

    Note: Check the link or the QR code to make sure that you use the latest version of this document: https://espressif.com/sites/default/files/documentation/esp32-c6_hardware_design_guidelines_en. ESP32-C6 series is a low-power MCU-based SoC solution that supports 2.4 GHz Wi-Fi 6 (802.11 ax), ® Bluetooth 5 (LE), Zigbee 3.0 and Thread 1.3 (802.15.4). With its state-of-the-art power and RF performance, this SoC is an ideal choice for a wide variety of application scenarios relating to Internet of Things (IoT), smart home, industrial automation, health care, and consumer electronics.

  • Page 6: Schematic Checklist

    PCB board. 0.1uF ESP32-C6 NC: No component. 0.1uF CHIP_EN: H Activate chip; L Disable chip. This pin could not be float. Figure 1: ESP32-C6 QFN40 Schematic Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 7 • ADC • Clock source • USB • RF • UART • SDIO The rest of this chapter details the specifics of circuit design for each of these sections. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 8: Power Supply

    Therefore, it is highly recommended to add a 10 µF capacitor to the power pin2 and pin3 VDDA3P3, which can work in conjunction with the 1 µF capacitor. In addition, a CLC filter circuit needs to be Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 9: Power-Up Timing And System Reset

    0.25 × VDDPST1) V. To avoid reboots caused by external interferences, make the CHIP_PU trace as short as possible. Also, add a pull-up resistor as well as a capacitor to the ground whenever possible. More details can be found in Section 2.2.3. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 10: Power-Up And Reset Timing

    SPI lines as shown in Figure 6, to lower the driving current, reduce interference to RF, adjust timing, and better shield from interference. ESP32-C6 series of chips in QFN32 package have in-package SPI flash. The pins for flash are not bonded out. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0...

  • Page 11: Clock Source

    (resistor or inductor) on the XTAL_P clock trace. Initially it is suggested to use an inductor of 24 nH, and the value should be adjusted after an overall test. Note that the accuracy of the selected crystal should be within ±10 ppm. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 12: Rtc (Optional)

    • The parallel resistor R is used for biasing the crystal circuit (5 MΩ < R ⩽ 10 MΩ). In general, you do not need to populate the resistor. • If the RTC source is not required, then the pins for the external 32.768 kHz crystal can be used as GPIOs. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 13 RF tuning of PCB board, which depends greatly on the antenna and PCB layout. The initial value of the resistor can be 0 Ω. For ESP32-C6 series of chips, it is recommended to set the S11 parameter in the figure below to 30+j0 Ω...

  • Page 14: Uart

    In this document we will mainly cover the strapping pins related to boot mode. GPIO8 and GPIO9 control the boot mode after the reset is released. See Table 3 Boot Mode Control Boot Mode Control. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 15: Gpio

    The content below is excerpted from ESP32-C6 Series Datasheet > Section Pins. The pins of ESP32-C6 series can be configured via IO MUX or GPIO matrix. IO MUX provides the default pin Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0...
  • Page 16 IE, WPU IO MUX SPIWP VDD_SPI IE, WPU Analog VDD_SPI Power/IO — IO MUX IO MUX SPIHD VDD_SPI IE, WPU IO MUX SPICLK VDD_SPI IE, WPU Cont’d on next page Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 17: Adc

    ESP32-C6 supports download and log printing over USB. For instructions on download over USB, please refer to Section 4.3. 2.11 SDIO ESP32-C6 series has only one SDIO slave controller that conforms to the industry-standard SDIO Specification Version 2.0. SDIO should be connected to specific GPIOs, namely SDIO_CMD, SDIO_CLK, SDIO_DATA0, Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0...
  • Page 18 2 Schematic Checklist SDIO_DATA1, SDIO_DATA2, and SDIO_DATA3. Please add a pull-up resistor to these GPIOs, and preferably reserve a series resistor on each trace. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 19: Pcb Layout Design

    • Layer 2 (BOTTOM): Do not place any components on this layer and keep traces to a minimum. Please make sure there is a complete GND plane for the chip, RF and crystal. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 20: Positioning A Module On A Base Board

    Figure 14: Placement of ESP32-C6 Modules on Base Board (antenna feed point on the right) ✓ Base board ✓ Figure 15: Placement of ESP32-C6 Modules on Base Board (antenna feed point on the left) Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 21 RF verification. As a conclusion, please be noted it is necessary to test the throughput and communication signal range of the whole product to ensure the product’s actual RF performance. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 22: Power Supply

    • VDDA3P3 should be surrounded by grounding copper on both sides, and isolated by GND from the RF and GPIO traces nearby. Vias should be placed whenever possible. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 23: Crystal

    • As the crystal is a sensitive component, do not place any magnetic components nearby that may cause interference, for example large inductance component, and ensure that there is a clean large-area ground plane around the crystal. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 24 π-type matching circuit should be added on the RF trace and placed close to the chip, in a zigzag. • For designing the RF trace at 50 Ω impedance, you could refer to the PCB stack-up design shown in Figure Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 25 USB port, USB-to-serial chip, UART signal lines (including traces, vias, test points, header pins, etc.) must be as far away from the antenna as possible. The UART signal line should be surrounded by ground copper and ground vias. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 26: Flash

    The series resistor on the U0TXD trace needs to be placed close to the chip and away from the crystal. The U0TXD and U0RXD traces on the top layer should be as short as possible, surrounded by ground copper and ground vias. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 27: Usb

    Add a 10 µF filter capacitor to the branch of the power trace (the branch powering the chip’s analog power pin). The 10 µF capacitor should be as close to the analog power pin as possible for small and stable current ripples. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 28: Q: The Power Ripple Is Small, But Rf Tx Performance Is Poor

    Solution: Keep the antenna away from crystals. Do not route high-frequency signal traces close to the RF trace. Please see Section for details. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...

  • Page 29: Hardware Development

    USB for download next time, and need to set the chip to Download Boot mode first. • It is recommended to reserve UART0 connector as an alternative way to download. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 30 Find an Espressif hardware product suitable for your needs by comparing or applying filters. https://products.espressif.com/#/product-selector?language=en Contact Us • See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples (Online stores), Become Our Supplier, Comments & Suggestions. https://espressif.com/en/contact-us/sales-questions Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 31 Power Amplifier Resistor-Capacitor Real-Time Clock System-in-Package Zero-ohm resistor A zero-ohm resistor is a placeholder on the circuit so that another higher ohm resistor can replace it, depending on design cases. Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 32 Revision History Revision History Date Version Release Notes 2023-03-09 v1.0 First release Espressif Systems ESP32-C6 Series Hardware Design Guidelines v1.0 Submit Documentation Feedback...
  • Page 33 The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a registered trademark of Bluetooth SIG. All trade names, trademarks and registered trademarks mentioned in this document are property www.espressif.com of their respective owners, and are hereby acknowledged. Copyright © 2023 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.

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