Power-On Sequence And Reset; Power-On Sequence; Reset; Flash - Espressif Systems ESP32 Series Manual

3.1 Schematics
a power rail collapse. Therefore, it is recommended to add another 0603 10 µF capacitor to the power trace, which
can work in conjunction with the 0402 0.1 µF capacitor.

3.1.2 Power-on Sequence and Reset

3.1.2.1 Power-on Sequence

ESP32 uses a 3.3V system power supply. There is only one guideline that should be followed with regard to the
power-on sequence: The Pin9 CHIP_PU should be powered on later than, or at the same time as, the 3.3V system
power supply pin.
Notice:
If CHIP_PU is connected to the power management chip, then the power management chip controls
ESP32's power state. When the power management chip turns on/off Wi-Fi through the high/low level
on GPIO, a pulse current may be generated. To avoid level instability on CHIP_PU, an RC delay (R=1
kΩ, C=100 nF) is needed.

3.1.2.2 Reset

CHIP_PU serves as the reset pin of ESP32. ESP32 will power off when CHIP_PU is held low. To avoid reboots
caused by external interferences, the CHIP_PU trace should be as short as possible, while a pull-up resistor and
a ground capacitor are recommended.
Notice:
CHIP_PU pin cannot be floating.

3.1.3 Flash

ESP32 can support up to four 16 MB external QSPI flash and SRAM. The demo flash used currently is an SPI flash
with 4 MB ROM, in an SOIC_8 (SOP_8) package. The VDD_SDIO acts as the power supply pin. Make sure you
Espressif Systems
Figure 5: ESP32 Analog Power Supply Pins
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3 SCHEMATICS AND PCB LAYOUT DESIGN
ESP32 Hardware Design Guideline V1.0