Cn10 Tag Connector; Cn9 Extension Connector; Table 16. Cn10 Tag Connector; Table 17. Cn9 Extension Connector - STMicroelectronics B-G474E-DPOW1 Manual

Note: Pins 1, 3, 13, and 14 belong to the STDC14 footprint and are not accessible with MIPI10 compatible probe.
Note: 4-wire and 5-wire JTAG Debug modes are not supported by default. 4-wire JTAG mode may be used, but may
require to deactivate USB Type-C
bridge and to disconnect R89.
14.3

CN10 TAG connector

The TAG connector footprint is implemented on the bottom side of B-G474E-DPOW1.
To use the TAG connector footprint to debug STM32G474RET6, it is mandatory to place a jumper on JP6 to
connect STLK NRST to GND. This puts the STLINK-V3E MCU in a high impedance state.
In case the user wants to isolate completely the TAG connector from STLINK-V3E MCU, the SW1 mechanical
octal switch must be set accordingly and the JP7 jumper must be removed.
Using the TAG connector is exclusive to using the debug connector.
Pin
Description
number
1
2
3
4
5
14.4

CN9 extension connector

The 32-pin CN9 extension connector is accessible on the left-hand-side on top of the B-G474E-DPOW1, or on the
right-hand-side of its bottom. It provides access to some PIOs of STM32G474RET6 and most of the Discovery
board power supplies. It can be plugged on a breadboard for prototyping (2.54 mm pitch). All pins remain
accessible on the top side for probing.
Pin
Description
number
1
2
3
4
UM2577 - Rev 2
®
feature (In hardware and software), to connect JTDI with the SB28 solder
Figure 24.
Table 16.
Assignment
VDD 3V3
SWDIO T_SWDIO (PA13)
GND GND
SWCLK T_SWCLK (PA14)
GND -
Table 17.
Main function
5V_I Power
GND Power
5V_O Power
PA8 RGB LED
CN10 TAG connector
CN10 TAG connector
Pin
Description
number
10 NRST
9 NA
8 NA
7 NA
6 SWO
CN9 extension connector
Signal assignment
5V_IN
GND
5V_OUT
BUCK_BLUE_DRIVE
UM2577
CN10 TAG connector
Assignment
T_NRST (PG10)
-
-
-
T_SWO (PB3)
(1)
Optional modification
-
-
-
Remove R74
page 36/54