Microcontroller Power; Table 7. Jp4 Idd Configuration; Figure 15. Jp5 (E5V) From Cn9 (5V_I / Gnd); Figure 16. Jp4 Idd Default Configuration - STMicroelectronics B-G474E-DPOW1 Manual

Discovery kit with stm32g474re mcu
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10.3

Microcontroller power

By default, the STM32G474RET6 microcontroller power supplies are all connected to the VDD power supply. In
case the user wants to test any other power supply configuration, few solder bridges can be modified (Refer to
Section 15.2
VDD power supply is connected in the design to 3V3, 3.3 V-regulated output, which can draw a current up to
500 mA. The LDO regulator (LD39050PU33R) provides the VDD power supply from the 5 V general power
supply. As soon as VDD is available, the LD6 3V3 green LED is lit.
A jumper is fitted on the JP4 header to connect the LDO regulated output to the VDD power supply rail. An
ammeter can replace this jumper for IDD measurement. Refer to
Reference
Jumper
JP4
1. The default setting is in bold.
By default, analog ground VSSA and general ground VSS are connected together in one point of the design,
thanks to SB25.
VREF+ is the STM32G474RET6 input reference voltage for ADCs and DACs. It has different possible
configurations:
Connected to VDD (Default setting)
Connected to an embedded VREF PWR block function, which provides an accurate and low noise VREF
reference voltage, set at 3.25 V default value. This block is based on the TL1431 programmable voltage
reference.
Connected to the output of the STM32G474RET6 internal voltage reference buffer when enabled.
When using a VREF+ configuration different from the default one, the user must take care, and alternatively
needs to adapt the design parts using ADCs or DACs.
UM2577 - Rev 2
Figure 15.
).
Figure 16.
Table 7.
(1)
Function
ON
3V3 connected to VDD
OFF
3V3 not connected to VDD
JP5 (E5V) from CN9 (5V_I / GND)
Figure 16
JP4 IDD default configuration
JP4 IDD configuration
3V3 powers VDD. Current measurement is impossible.
VDD is not powered. Add an ammeter to measure the current.
UM2577
Microcontroller power
and
Table
7.
Comment
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