Winmate IF70 Mini-ITX SBC User Manual page 47

BIOS Setting Description
Enable Root Port Configure Root Port
parameters
Max Link Speed Select Max Link Speed
PEG0 Slot PEG0 Slot Power Limit
Power Limit Value
Value
PEG0 Slot Select PEG0 Slot Power
Power Limit Limit Scale
Scale
Program PCIe Program PCIe ASPM
ASPM after after OpROM
OpROM
Program Static Program Static Phase1
Phase1 Eq Eq
Always Attemp Always Attemp SW EQ
SW EQ
Number of Select number of
Presents to test Presents to test
Allow PERST # Allow PERST # GPIO
GPIO Usage Usage
SW EQ Enable Select Jitter, VOC test
VOC mode
2BChapter 3: Insyde H20 BIOS Setup
Setting Option Effect
Enabled Enable or disable Root Port
Disabled Auto
Auto Configure PEG 0:1:0 Max
Gen1 Speed
Gen2
Gen3
75 PEG0 Slot Power Limit Value
1.0x Select the scale used for Slot
0.1x Power Limit Value
0.01x
0.001x
Disabled PCIe ASPM will be
programmed before OpROM
Enabled PCIe ASPM will be
programmed after OpROM
Disabled Program Phase1 Presents/
Enabled CTLEp
Disabled Always Attemp SW EQ, even
Enabled it has been done once
7,3,5,8 Choose between 7,3,5,8 and
0-9 0-9. Auto = current default
Auto (7,3,5,8 for SKL). Do not
change the default unless
debugging.
Disabled Enable/ Disable GPIO-based
Enabled resets to PEG endpoint(s)
during margin search, if
needed
-Jitter Only Test Select Jitter & VOC test mode
Mode (default) or Jitter only test
-Jitter & VOC Test mode. Auto will current default
Mode (Enabled)
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