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4.4
Watchdog Timer Setting
The WDTM register is used to select the operation clock for the watchdog timer and the overflow time.
In this sample program, the watchdog timer is not used for program loop detection, so the WDTM register is set as
described in
[Example
1], mentioned later.
Caution The operation clock and overflow time for the watchdog timer must be set during the initial
settings.
Figure 4-2. Format of Watchdog Timer Mode Register (WDTM)
WDTM
0
1
1
WDCS
4
Notes 1. When "Watchdog timer operation stop" is selected, the overflow time setting is invalid (don't care).
2. To stop watchdog timer operation or to use the system clock as the watchdog timer operation clock, the
option byte must be used to set to "Oscillation is stopped by software setting (LSRSTOP bit is set to 1)".
For details, refer to
Caution Bits 7, 6, and 5 must be set to 0, 1, and 1, respectively.
Remark
x: don't care
14
CHAPTER 4 SETTING METHODS
WDCS
WDCS
WDCS
WDCS
3
2
1
4.1 Option Byte
Setting.
Application Note U18752EJ2V0AN
0
Note 1
Overflow time setting
During low-speed
internal oscillation
clock operation
11
0
0
0
2
/f
RL
12
0
0
1
2
/f
RL
13
0
1
0
2
/f
RL
14
0
1
1
2
/f
RL
15
1
0
0
2
/f
RL
16
1
0
1
2
/f
RL
17
1
1
0
2
/f
RL
18
1
1
1
2
/f
RL
Operation clock selection
0
0
Low-speed internal oscillation clock (f
0
1
System clock (f
1
x
Watchdog timer operation stop
During system clock
operation
13
2
/f
X
14
2
/f
X
15
2
/f
X
16
2
/f
X
17
2
/f
X
18
2
/f
X
19
2
/f
X
20
2
/f
X
Note 2
)
RL
)
X
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