Hardware Reference; Clock Selection - Analog Devices AD9739A Manual

AD9739A Native FMC Card / Xilinx Reference Designs [Analog Devices Wiki]
Notes
In order to fully use the reference design, you will need to generate all the Xilinx IP's used by the
reference design yourself. The following two files are missing from the gzip file.
pcores/cf_ad9739a_core_v1_00_a/netlist/cf_ddsx_1.ngc
pcores/cf_ad9739a_core_v1_00_a/hdl/verilog/cf_ddsx_1.v
You must generate these two files using coregen. The reference design uses the following
parameters:
amplitude_mode=Full_Range
channels=1
noise_shaping=Taylor_Series_Corrected
output_selection=Sine
output_width=16
partspresent=SIN_COS_LUT_only
phase_increment=Fixed
phase_offset=None
phase_width=16
The above list is partial and only lists the key parameters for reference.

Hardware Reference

There are several hardware options available on the AD9739A-FMC-EBZ:

Clock Selection

Two clock paths are availabe to drive the clock input on the AD9739A-FMC-EBZ. The factory
default option connects the
[http://www.analog.com/AD9739A]
synthesize a clock
[http://www.analog.com/AD9739A]
Alternatively, an external clock can be provided via the SMA CLKIN (J3) jack. To enable this
clock path, jumper CLK SRC (P3) must be moved to the SMA 1 position. C102 and C99 on the
back of the board also need to be removed from their default position, and then soldered into
the vertical position from the large square pad they were previously soldered to and the narrow
pads closer to the
of the caps before removing them; they must be soldered with their narrow edge against the
PCB, and not the wide side as is common with most components.
SPI Source Selection
There are two options for driving the SPI port of the
and ADF4350
[http://www.analog.com/ADF4350]
above, is to have all the SPI lines driven by the FPGA. In this case, jumper SPI SRC (P2) is set to
FMC. A level transltor (
2.5V logic from the FPGA to the 3.3V logic required by the parts on the board.
http://wiki.analog.com/resources/fpga/xilinx/fmc/ad9739a?force_rev=1
ADF4350
[http://www.analog.com/ADF4350]
. The ADF4350
over the entire
(1.6GHz to 2.5GHz).
ADCLK914
[http://www.analog.com/ADCLK914]
ADG3308
[http://www.analog.com/ADG3308]
[http://www.analog.com/ADF4350]
specified range
(U3). Observe the orientation
AD9739A
[http://www.analog.com/AD9739A]
. The first, which is used in the quick start guide
U1) is used to translate the
Page 7 of 12
to the AD9739A
is able to
of the AD9739A
5/22/2012