Example Of Application; Dual Slow Interleaved Mode; Description; Figure 9. Dual Fast Interleaved Mode - ST STM32 Application Note

AN3116
Figure 9.
2.2.2

Example of application

This mode is used to speed up the sampling rate of the ADC when 2 Msamples/second are
needed with 1.5 cycle of sampling time. ADC1 and ADC2 convert the same channel
alternately to reduce the conversion time. While ADC1 samples channel CHx, ADC2
converts the previous sample.
For example if a signal to be converted has a maximum frequency of 800 kHz, the sampling
rate frequency should be higher than or equal to twice the frequency of the signal to be
converted (in accordance with Shannon-Nyquist criteria). Since the maximum sampling rate
is 1 Msample/second with one ADC, the criteria cannot be met. This is solved by using the
dual fast interleaved ADC mode. In this way, the sampling rate frequency becomes
2 Msample/second since the two ADCs (ADC1 and ADC2) work alternately and sample the
signal at equal periods (7 ADC cycles).
With the dual fast interleaved ADC mode, 2 Msamples/second can be achieved with 1.5
cycles of sampling time.
2.3

Dual slow interleaved mode

2.3.1

Description

The dual slow interleaved ADC mode is intended for the conversion of one channel. ADC1
and ADC2 convert the selected channel alternately with a period of 14 ADC clock cycles.
The channel is thus converted every 14 clock cycles. Each ADC converts the channel every
28 ADC clock cycles. The conversion can be started by external trigger or by software and
the conversion results of ADC1 and ADC2 are stored into ADC1's data register (32-bit
format).
The maximum allowed sampling time is 14 ADC clock cycles to avoid any overlap with the
next conversion. This means that the only allowed sampling times are 1.5, 7.5 and 13.5
cycles.
Continuous conversion should not be used in this mode since the ADCs would continuously
convert the selected regular channel automatically (the CONT bit should not be set in this
mode).
Note: 1 It is highly recommended to use DMA instead of interrupts to avoid the loss of data.
2 An example of firmware is provided with this application note: Dual_SlowInterleaved.
Dual fast interleaved mode
Doc ID 16840 Rev 1
Dual modes
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