Communications Header (J1); Self-Boot - Analog Devices EVAL-ADAU1777Z User Manual

UG-1055
2
TDM/I S Stream
To use the serial audio outputs, connect the LRCLK, BCLK, and
SDATA lines to the appropriate MP pins on the evaluation
board. The connections are located on the J4 header. The silk
screen above the header helps to identify where to connect the
clocks and data (see Figure 42).
Figure 42. Serial Audio Port
When the MP pins are connected, use
registers for the desired operation. In the Output/Serial Port
tab, the Serial Port Control section contains settings that can
be changed to create the specific data stream desired. These
settings include Serial Port FS (sample rate), Serial Port Mode,
Serial Port Format, LRCLK/BCLK Mode (slave or master),
BCLK Data-Change Edge, Bit Width in TDM mode, BCLK
Cycles per Channel, Data IO on LSB/MSB, Unused TDM
Outputs, LRCLK Mode (as pulse or 50% duty cycle), and
LRCLK Polarity (see Figure 43).
Figure 43. Serial Port Control
SigmaStudio to set the
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EVAL-ADAU1777Z User Guide
If using TDM mode, ensure that the appropriate TDM output
channels have been enabled in the TDM Output Channel
section (see Figure 44).
Figure 44. TDM Output Channel
Use the Signal Routing tab to route the core outputs, ADCs, or
serial inputs to the either of the two available serial output lines.
Ensure that Output ASRC is set to Enabled (see Figure 45).
Figure 45. Signal Routing

COMMUNICATIONS HEADER (J1)

J1 connects to the EVAL-ADUSB2EBZ
about the USBi can be found in the
2
The IC defaults to I C mode; however, it can be put into SPI
control mode by pulling the CLATCH pin low three times.

SELF-BOOT

To use the ADAU1777 self-boot function, go to the Hardware
Configuration tab and add an E2Prom IC to the USBi interface
from the Tree Toolbox (see Figure 46).
Figure 46. E2Prom
USBi. More information
AN-1006 application note.