I2C Interfaces; Serial Ports; Can Bus; Table 9 I2C Interfaces - Congatec SMARC conga-SMX8-X User Manual

5.6

I2C Interfaces

The conga-SMX8-X offers the Inter-Integrated Circuit (I2C) buses as defined in the SMARC Hardware Specification 2.0. The buses support the
recommended multi-master capability and data rates of 100 kHz and 400 kHz.
The I²C device addresses are listed in the table below:

Table 9 I2C Interfaces

I2C-Bus
PMIC_I2C PMIC
M40_I2C0 RTC
ADMA_I2C1 SMARC-I2C_PM
ADMA_I2C3 SMARC-I2C_GP Expander
SEVA-I2S-Codec
SEVA-EEPROM
SEVA-Postcode
MIPI_DSI0_I2C0 SMARC-I2C_LCD
MIPI_DSI1_I2C0 HDMI-converter
MIPI_CSI_I2C0 SMARC-CAM1_I2C
5.7

Serial Ports

The conga-SMX8-X offers SER[0:2] pins for three asynchronous serial ports by default. Each port supports programmable baud rates of up to
4 Mbps. SER0 and SER2 support handshaking.
Optionally, the conga-SMX8-X can offer SER3 pins instead of CAN1 (assembly option). For more information, see section 5.8 "CAN Bus".
5.8

CAN Bus

The conga-SMX8-X offers CAN[0:1] pins for two Controller Area Network (CAN) buses by default via ISO 11898-1 standard compliant FlexCAN
controllers integrated in the SoC. Each bus supports the CAN FD and CAN 2.0 B protocols.
Optionally, the conga-SMX8-X can offer SER3 pins instead of the CAN1 pins (assembly option).
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Sink Sink Address
0x08
0xD0
0x72 .. x073
0x1A
0x50 .. 0x57
0x71
0x7A
SX8Xm01 23/32