User Manual
07/02/04
Board ID Function
dip[6:1] = BCM1125H software config[5:0] bits. See
for more information.
SW11
8-position DIP switch, for BCM1125 clk configuration dip[1:8]
dip[1] = reserved
dip[2] = IOB1 clock divider iob1_div (off = /3; on = /2)
dip[3] = IOB0 clock divider iob0_div (off = /4; on = /3)
dip[4] = CPU clock divider pll_div[4] (off = 0; on = 1)
dip[5] = CPU clock divider pll_div[[3] (off = 1; on = 0)
dip[6:8] = CPU clock divider pll_div[2:0] (off = 0; on = 1)
SW12
NMI (GPIO 0) asserted when the button is pressed
Document
91125PCIX-UM100-R
Table 6: Switch Descriptions
B roadc om C or por ati on
BCM91125PCIX
(Cont.)
Default
Table 14
off, off, off, off, on, off
See specific bits below.
off
Depends on BCM1125H speed
bin. See
Table 8
settings.
Depends on BCM1125H speed
bin. See
Table 7
settings.
N/A
for acceptable
for acceptable
Switches
Page
17
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