Silicon Laboratories Si4010 Software Programming Manual page 17

define all the SFR, XDATA mapped XREG registers, boot status variables, and interrupt priority numbers. Same
items are defined in both the C and assembly headers, so only the C header is used to describe what is present
there. The same applies to the assembly device header.
For each of the fields in each of the SFR or XREG registers there is a register address defined. However, if the byte
wide register consists of more than one field which has a width less than 8 bits, there are two additional items
defined for each field, mask and bit location. The mask field name has M_ prefix, while the bit index name has B_
prefix:
1. The bit mask for the field. The mask contains 1 at the bit positions within a byte occupied by the field:
#define M_<FIELD NAME>
2. The bit index number within the byte where the field begins. In other words, the base bit index of the field within
a byte:
#define B_<FIELD NAME>
For example:
/* -- ODS_TIMING .. 0xaa */
#define M_ODS_CK_DIV
#define M_ODS_EDGE_TIME
#define M_ODS_GROUP_WIDTH
#define B_ODS_CK_DIV
#define B_ODS_EDGE_TIME
#define B_ODS_GROUP_WIDTH
The #define statements were added for convenience to initialize or modify the single and multi-bit fields inside of
the registers. For example if the user desires to initialize fields ODC_CK_DIV to 5, ODS_EDGE_TIME to 2, and
ODS_GROUP_WIDTH to 6 in the ODS_TIMING register then in the usual manner the user would have to define
the masks himself or use direct constants in the code:
ODS_TIMING = 5 | (2 << 3) | (6 << 5);
Hard to read what the intent was. Suggested way using the provided base bit constants is as follows:
ODS_TIMING = (5 << B_ODS_CK_DIV)
| (2 << B_ODS_EDGE_TIME)
| (6 << B_ODS_GROUP_WIDTH);
To use this naming to clear the Matrix and Roff mode bits at the beginning of the user application, the code can be
made very readable:
/* Disable the Matrix and Roff modes on GPIO[3:1] */
PORT_CTRL &= ~(M_PORT_MATRIX | M_PORT_ROFF | M_PORT_STROBE);
PORT_CTRL |= M_PORT_STROBE;
PORT_CTRL &= (~M_PORT_STROBE);
<field bit mask>
<field low significant bit index>
0x07 .. field mask defines
0x18
0xe0
0 .. base bit index defines
3
5
Rev. 1.0
AN370
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