Process Data And Memory Map - Beckhoff BC7300 Manual

MODBUS
Cable
Sub-D socket
Bus termination
20
BC7300
TxD/RxD (3)
RxD/TxD (8)
8: RxD/TxD
6: 5 V
The MODBUS requires termination resistors at the beginning and end of
the bus lines.

Process Data and Memory Map

The following example illustrates how the process image is constructed in
the Bus Terminal Controller, and the functions of the MODBUS telegram
with which digital and analog values can be read.
The Bus Terminal Controller has two process images. One is the fieldbus
interface and the other is the process image on the Bus Terminal
Controller. Bus Terminals can be assigned to one or the other process
image. The PLC variables offer an interface between these two process
images.
MODBUS
The input process image of the BC7300 starts from address 0x0000. All
the byte-oriented Bus Terminals (see Appendix) are entered here into the
process image first. The bit-oriented Bus Terminals them follow, and each
word (16 bit) is filled before starting a new one. The PLC variables are
entered into the process image last.
The output process image starts at address 0x0800. The entry begins
again here with the byte-oriented Bus Terminals, continues with the bit-
oriented Bus Terminals and finally the PLC variables.
All the digital signals can be directly addressed with functions 1, 2, 5 and
15.
Abschirmung
PE
5: GND
3: RxD/TxD
1
5 V (6)
RxD/TxD (3)
TxD/RxD (8)
GND (5)
BC7300
RxD/TxD (3)
TxD/RxD (8)
BC7300