Table of Contents
Advertisement
Frame Buffer A
5
FRAME BUFFER PARTITION A 31..0
VRAM=K4G80325FB-HC03, HC28
M6A
NORMAL
FBA_D4
B4
DQ0_A
FBA_D7
A3
D
DQ1_A
FBA_D1
B3
DQ2_A
FBA_D5
B2
DQ3_A
FBA_D3
E3
DQ4_A
FBA_D6
E2
DQ5_A
FBA_D2
F2
DQ6_A
FBA_D0
G2
DQ7_A
FBA_EDC0
C2
EDC0_A
FBA_DBI0
D2
DBI0_A
FBA_W CK01
D4
WCK0_t_A
FBA_W CK01*
D5
WCK0_c_A
x16
x8
FBA_D8
B11
NC
DQ8_A
FBA_D15
A12
DQ9_A
NC
FBA_D13
B12
NC
DQ10_A
FBA_D14
B13
NC
DQ11_A
FBA_D12
E12
NC
DQ12_A
FBA_D10
E13
DQ13_A
NC
FBA_D11
F13
DQ14_A
NC
FBA_D9
G13
NC
DQ15_A
FBA_EDC1
C13
EDC1_A
GND
FBA_DBI1
D13
DBI1_A
NC
FBA_W CKB01
D11
WCK1_t_A
NC
FBA_W CKB01*
C
D10
WCK1_c_A
NC
U_MEM_SG_GDDR6
P/N =
Close to DRAM
FBVDDQ
FBVDDQ
FBVDDQ
C1057
C1056
C1079
C1059
C1053
C730
Around DRAM
Around DRAM
FBVDDQ
FBVDDQ
C1054
C1055
C644
C645
C1058
C741
B
FBVDDQ
FBVDDQ
C580
C577
C534
C576
C526
C282
C201
C1007
C1027
C1001
Right under DRAM
Right under DRAM
FBVDDQ
FBVDDQ
C1061
C1044
C1045
C1000
C496
C473
C455
C426
C416
C383
A
Close to DRAM
Close to DRAM
5
4
3
11
FBA_W CK01
11
FBA_W CK01*
11
FBA_W CK23
11
FBA_W CK23*
11
FBA_W CKB01
M6B
11
FBA_W CKB01*
11
FBA_W CKB23
11
FBA_W CKB23*
NORMAL
x16
x8
FBA_D30
U4
DQ0_B
NC
FBA_D29
V3
DQ1_B
NC
FBA_D28
U3
DQ2_B
NC
FBA_CMD0
H3
FBA_D31
U2
DQ3_B
NC
FBA_CMD9
G11
FBA_D25
P3
DQ4_B
NC
FBA_CMD8
G4
FBA_D27
P2
DQ5_B
NC
FBA_CMD32
H12
FBA_D24
N2
DQ6_B
NC
FBA_CMD7
H5
FBA_D26
M2
DQ7_B
NC
FBA_CMD11
H10
FBA_CMD15
J12
FBA_EDC3
T2
EDC0_B
GND
FBA_CMD14
J11
FBA_DBI3
R2
DBI0_B
NC
FBA_CMD3
J4
FBA_CMD1
J3
FBA_W CKB23
R4
WCK0_t_B
NC
FBA_CMD6
J5
FBA_W CKB23*
R5
WCK0_c_B
NC
FBA_CMD10
G10
FBA_D23
U11
DQ8_B
FBA_D22
V12
DQ9_B
FBA_D20
U12
DQ10_B
FBA_D17
U13
DQ11_B
FBA_D21
P12
DQ12_B
FBA_D16
P13
DQ13_B
FBA_D19
N13
DQ14_B
FBA_CMD4
L3
FBA_D18
M13
DQ15_B
FBA_CMD12
M11
FBA_CMD5
M4
FBA_EDC2
T13
EDC1_B
FBA_CMD13
L12
FBA_DBI2
R13
DBI1_B
FBA_CMD7
L5
FBA_CMD11
L10
FBA_W CK23
R11
WCK1_t_B
FBA_CMD15
K12
FBA_W CK23*
R10
WCK1_c_B
FBA_CMD14
K11
FBA_CMD3
K4
FBA_CMD1
K3
FBA_CMD6
K5
U_MEM_SG_GDDR6
FBA_CMD10
M10
P/N =
FBA_CMD2
J1
K10
11
FBA_CLK0*
J10
11
FBA_CLK0
C1006
C726
OPTION, Under DRAM
1V8_AON
C973
C249
C310
C142
C347
C1119
C337
4
3
2
FBA_W CK01
FBA_DBI[3..0]
M6D
FBA_W CK01*
11
FBA_DBI[3..0]
FBA_W CK23
FBA_EDC[3..0]
FBA_W CK23*
11
FBA_EDC[3..0]
FBA_CMD[15..0]
FBA_W CKB01
11
FBA_CMD[15..0]
FBA_W CKB01*
FBA_CMD32
A11
VSS
11
FBA_CMD32
FBA_W CKB23
A13
FBA_D[31..0]
VSS
FBA_W CKB23*
A2
11
FBA_D[31..0]
VSS
A4
VSS
B1
VSS
M6C
B14
VSS
C10
VSS
C12
VSS
K1
FBA_VREFC
C3
CA0_A
VREFC
VSS
C5
CA1_A
VSS
D1
CA2_A
VSS
D12
CA3_A
VSS
D14
CA4_A
VSS
D3
CA5_A
VSS
E11
CA6_A
VSS
E4
CA7_A
VSS
F1
CA8_A
VSS
F12
CA9_A
VSS
F14
CABI_A
VSS
F3
CKE_A
VSS
G1
VSS
N5
SNN_FBAL_TCK_M
G12
TCK
T31
VSS
F10
SNN_FBAL_TDI_M
G14
TDI
T28
VSS
N10
SNN_FBAL_TDO_M
G3
TDO
VSS
T29
SNN_FBAL_TMS_M
F5
H11
TMS
VSS
T34
H4
VSS
L11
VSS
L4
CA0_B
VSS
M1
CA1_B
VSS
M12
CA2_B
VSS
M14
CA3_B
VSS
M3
CA4_B
VSS
N1
CA5_B
VSS
N12
CA6_B
VSS
N14
CA7_B
VSS
N3
CA8_B
VSS
P11
CA9_B
VSS
P4
CABI_B
VSS
R1
CKE_B
VSS
FBA_ZQ_1_A
J14
R12
ZQ_A
VSS
K14
FBA_ZQ_1_B
R14
ZQ_B
VSS
R3
VSS
T10
VSS
R561
R157
T12
VSS
T3
RESET
VSS
121_1%_04
121_1%_04
T5
VSS
U1
VSS
U14
VSS
V11
CLK_c
VSS
V13
CLK_t
VSS
V2
VSS
V4
VSS
G5
SNN_FBAL_RFU_A_M
RFU_A
T33
SNN_FBAL_RFU_B_M
M5
RFU_B
T30
U_MEM_SG_GDDR6
U_MEM_SG_GDDR6
P/N =
P/N =
FBVDDQ
R107
*549_1%_04
R106
1K_1%_04
G
14,17,23
GPIO10_FBVREF_SEL
10,13,14,15,17,18,20,21,22,23,24,25,56,59,60,72
11,13,14,15,16,17,18,19,25,59
Title
Title
Title
[12]MEMORY FBA 31..0
[12]MEMORY FBA 31..0
[12]MEMORY FBA 31..0
Size
Size
Size
Document Number
Document Number
Document Number
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
6-71-NH5D0-D02
6-71-NH5D0-D02
6-71-NH5D0-D02
Date:
Date:
Date:
Tuesday, February 18, 2020
Tuesday, February 18, 2020
Tuesday, February 18, 2020
2
Schematic Diagrams
1
FBVDDQ
A1
VDD
A14
VDD
E10
VDD
E5
VDD
H13
VDD
H2
VDD
D
L13
VDD
L2
VDD
P10
VDD
P5
VDD
V1
VDD
V14
VDD
FBVDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C11
VDDQ
C14
VDDQ
C4
VDDQ
E1
VDDQ
E14
VDDQ
F11
VDDQ
F4
VDDQ
H1
VDDQ
Sheet 12 of 67
H14
VDDQ
J13
VDDQ
J2
VDDQ
K13
VDDQ
Frame Buffer A
K2
VDDQ
L1
VDDQ
C
L14
VDDQ
N11
VDDQ
N4
VDDQ
P1
VDDQ
P14
VDDQ
T1
VDDQ
T11
VDDQ
T14
VDDQ
T4
VDDQ
U10
VDDQ
U5
VDDQ
1V8_AON
A10
VPP
A5
VPP
V10
VPP
V5
VPP
B
FBA_VREFC
FBA_VREFC
13
R108
C152
*931_1%_04
*820p_50V_X7R_04
Q52
*MTN2002ZS3
A
1V8_AON
FBVDDQ
Rev
Rev
Rev
D02
D02
D02
Sheet
Sheet
Sheet
12
12
12
of
of
of
74
74
74
1
Frame Buffer A B - 13
Hide quick links:
Advertisement
Table of Contents
