Related Manuals for ADLINK Technology EGX-MXM-P2000
Summary of Contents for ADLINK Technology EGX-MXM-P2000
- Page 1 EGX-MXM-P2000 NVIDIA® Pascal™ GP107 Quadro® P2000 Embedded Graphics Module User’s Manual Manual Rev.: November 21, 2019 Revision Date: 50-1Z300-1000 Part No: Leading EDGE COMPUTING...
- Page 2 Leading EDGE COMPUTING Revision History Revision Release Date Description of Change(s) 2019-11-21 Initial release Revision History...
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Page 3: Preface
EGX-MXM-P2000 Preface Copyright © 2019 ADLINK Technology Inc. This document contains proprietary information protected by copy- right. All rights are reserved. No part of this manual may be repro- duced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. - Page 4 Leading EDGE COMPUTING California Proposition 65 Warning WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl) phosphate (TDCPP), 1,4- Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause...
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Page 5: Table Of Contents
EGX-MXM-P2000 Table of Contents Revision History..............ii Preface ..................iii List of Tables................. vii List of Figures ................ ix 1 Introduction ................ 1 Overview................1 Features................1 Specifications............... 2 1.3.1 Board Specifications........... 2 1.3.2 Memory Configuration ..........3 1.3.3 Display Support and Options........3 1.3.4... - Page 6 Leading EDGE COMPUTING Certifications & Agencies ........... 19 Important Safety Instructions..........21 Getting Service ..............23 Table of Contents...
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Page 7: List Of Tables
EGX-MXM-P2000 List of Tables Table 1-1: Board Specifications........... 2 Table 1-2: Memory Configuration ..........3 Table 1-3: Display Support and Options........3 Table 1-4: Graphics Module Display Options ......4 Table 1-5: NVIDIA Link Display Types ........4 Table 1-6: MXM Connector Pin Definition ........ - Page 8 Leading EDGE COMPUTING This page intentionally left blank. viii List of Tables...
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Page 9: List Of Figures
EGX-MXM-P2000 List of Figures Figure 1-1: Functional Block Diagram........... 5 Figure 1-2: MXM Module Basic Dimensions......... 6 Figure 1-3: MXM Module Detailed Dimensions and Layout..7 Figure 2-1: Power Sequencing ........... 15 Figure 2-2: Module Power Down ..........16 Figure 2-3: Reset Sequencing ............ - Page 10 Leading EDGE COMPUTING This page intentionally left blank. List of Figures...
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Page 11: Introduction
EGX-MXM-P2000 Introduction 1.1 Overview The EGX-MXM-P2000 module features advanced NVIDIA® Quadro® Pascal™ architecture in the MXM 3.1 Type A form fac- tor. The P2000 brings a new level of performance to visual graph- ics and computing applications, fully integrating hardware... -
Page 12: Specifications
Leading EDGE COMPUTING 1.3 Specifications 1.3.1 Board Specifications Graphics Core Architecture NVIDIA® Pascal™ GP107 Quadro® P2000 4x DisplayPort 1.4 digital video outputs Display Outputs Support for High Dynamic Range (HDR) video 4K at 98Hz with 10-bit color depth Signal Interface MXM 3.1, PCI Express Gen3 x16 support GPGPU Computing 768 CUDA cores, 2.3TFLOPS SP Peak... -
Page 13: Memory Configuration
EGX-MXM-P2000 1.3.2 Memory Configuration GDDR5@6Gbps Memory 256Mx32 Configuration 128-bit 82 GB/s data rate Memory Bandwidth x32 GDDR5 DRAM device data width Total 4GB Capacity Table 1-2: Memory Configuration 1.3.3 Display Support and Options 1.2, 1.3, 1.4 Max. pixel clock: 1050 MP/s DisplayPort Max. -
Page 14: Graphics Options
Leading EDGE COMPUTING 1.3.6 Graphics Options The EGX-MXM-P2000 supports 4x DisplayPort by default. The graphics module display options are as shown. Item Detail MXM Port DP_A DP_B DP_C DP_D NVIDIA Link Link E Link F Link A Link B Table 1-4: Graphics Module Display Options... -
Page 15: Functional Block Diagram
EGX-MXM-P2000 1.4 Functional Block Diagram GDDR5 PCIE x16 Gen3 Channel A GDDR5 x32 PCIE memory down DP1.4 GDDR5 x32 IFPA memory down DP1.4 IFPB GDDR5 Channel B GDDR5 x32 DP1.4 memory down IFPE DP1.4 GDDR5 x32 IFPF memory down N18P-Q3 50W... -
Page 16: Layout And I/O
Leading EDGE COMPUTING 1.5 Layout and I/O All dimensions shown are in mm. Figure 1-2: MXM Module Basic Dimensions Introduction... -
Page 17: Figure 1-3: Mxm Module Detailed Dimensions And Layout
EGX-MXM-P2000 Figure 1-3: MXM Module Detailed Dimensions and Component Layout Introduction... -
Page 18: Mxm Connector Pin Definition
Leading EDGE COMPUTING 1.5.1 MXM Connector Pin Definition Primary Side (Underside) Secondary Side (Top Side) Signal PU/PD/NI Pin Signal PU/PD/NI PWR_SRC PWR_SRC PRSNT_R# 0Ω PD WAKE# PWR_GOOD PWR_EN 27MHZ_REF LVDS_U_HPD JTAG_TESTEN 100K PU PWR_LEVEL 3.3V 100K PU PEX_STD_SW# TH_OVERT# 3.3V 100K PU VGA_DISABLE# TH_ALERT#... - Page 19 EGX-MXM-P2000 Primary Side (Underside) Secondary Side (Top Side) Signal PU/PD/NI Pin Signal PU/PD/NI PEX_TX15# PEX_RX15# PEX_TX15 PEX_RX15 PEX_TX14# PEX_RX14# PEX_TX14 PEX_RX14 PEX_TX13# PEX_RX13# PEX_TX13 PEX_RX13 PEX_TX12# PEX_RX12# PEX_TX12 PEX_RX12 PEX_TX11# PEX_RX11# PEX_TX11 PEX_RX11 PEX_TX10# PEX_RX10# PEX_TX10 PEX_RX10 PEX_TX9# PEX_RX9# PEX_TX9...
- Page 20 Leading EDGE COMPUTING Primary Side (Underside) Secondary Side (Top Side) Signal PU/PD/NI Pin Signal PU/PD/NI PEX_TX5# PEX_RX5# PEX_TX5 PEX_RX5 PEX_TX4# PEX_RX4# PEX_TX4 PEX_RX4 PEX_TX3# PEX_RX3# PEX_TX3 PEX_RX3 PEX_RX2# PEX_TX2# PEX_RX2 PEX_TX2 PEX_RX1# PEX_TX1# PEX_RX1 PEX_TX1 PEX_RX0# PEX_TX0# PEX_RX0 PEX_TX0 PEX_REFCLK# PEX_CLK_REQ# PEX_REFCLK PEX_RST#...
- Page 21 EGX-MXM-P2000 Primary Side (Underside) Secondary Side (Top Side) Signal PU/PD/NI Pin Signal PU/PD/NI JTAG_TRST# VGA_RED LVDS_UCLK# VGA_GREEN LVDS_UCLK VGA_BLUE LVDS_UTX3# LVDS_LCLK# LVDS_UTX3 LVDS_LCLK LVDS_UTX2# LVDS_LTX3# LVDS_UTX2 LVDS_LTX3 LVDS_UTX1# LVDS_LTX2# LVDS_UTX1 LVDS_LTX2 LVDS_UTX0# LVDS_LTX1# LVDS_UTX0 LVDS_LTX1 DP_C_L0# LVDS_LTX0# DP_C_L0 LVDS_LTX0 DP_C_L1#...
- Page 22 Leading EDGE COMPUTING Primary Side (Underside) Secondary Side (Top Side) Signal PU/PD/NI Pin Signal PU/PD/NI RSVD RSVD DP_D_AUX# RSVD DP_D_AUX RSVD DP_C_HPD RSVD DP_D_HPD RSVD RSVD RSVD RSVD RSVD RSVD DP_B_L0# RSVD DP_B_L0 RSVD DP_B_L1# DP_A_L0# DP_B_L1 DP_A_L0 DP_B_L2# DP_A_L1# DP_B_L2 DP_A_L1 DP_B_L3#...
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Page 23: Thermal Policy
Retain the shipping carton and packing materials for inspection. Obtain authorization from your dealer before returning any product to ADLINK. Ensure that the fol- lowing items are included in the package. EGX-MXM-P2000 GPU module Introduction... - Page 24 Leading EDGE COMPUTING This page intentionally left blank. Introduction...
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Page 25: System Requirements
EGX-MXM-P2000 System Requirements 2.1 Power Sequencing For initial power on, or to resume from S3 and S4, this sequence must be followed. PV-PE PE-PG ≥0m s ≤90 m s PWR_SRC PWR_EN Module Internal Power PWR_GOOD Figure 2-1: Power Sequencing System Requirements... -
Page 26: Module Power Up And Down
Leading EDGE COMPUTING 2.2 Module Power Up and Down Issuing the PWR_EN signal powers the MXM module down, and the system designer can decide whether to keep the module input power when the MXM module is powered down. Module Input Power PWR_EN Module Internal Power... -
Page 27: Dual Mode Displayport Implementation
EGX-MXM-P2000 2.4 Dual Mode DisplayPort Implementation The EGX-MXM-P2000 supports four dual mode DisplayPorts by default. HDMI is supported via dongle (see “Display Support and Options” on page 3.). The system requires a switch circuit to determine whether the AUX or DDC signal is output from the MXM module, and AC coupling capacitors should be placed on the sys- tem board. -
Page 28: Dvi/Hdmi On Displayport Interface
Leading EDGE COMPUTING 2.5 DVI/HDMI on DisplayPort Interface DVI and HDMI connectors can both be implemented through the DisplayPort interface. Circuits required on the system board are as shown. 499Ω with 1% pulldown resistors to the ground on the DP lanes must placed on the DVI/HDMI connector side of the AC cou- pling, gated by a MOSFET to limit leakage. -
Page 29: Driver Installation
EGX-MXM-P2000 2.6 Driver Installation Drivers can be downloaded from: https://www.nvidia.com.tw/Download/index.aspx 2.7 Certifications & Agencies Windows Hardware Quality Lab (WHQL) certified Windows 7, and Windows 10 EU Reduction of Hazardous Substances (EU-RoHS) Conformité Européenne (CE) Federal Communications Commission (FCC) System Requirements... - Page 30 Leading EDGE COMPUTING This page intentionally left blank. System Requirements...
- Page 31 EGX-MXM-P2000 Important Safety Instructions For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage. S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures...
- Page 32 Leading EDGE COMPUTING Never attempt to repair the device, which should only be serviced by qualified technical personnel using suitable tools A Lithium-type battery may be provided for uninterrupted backup or emergency power. Risk of explosion if battery is replaced with one of an incorrect type;...
- Page 33 San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd. 300 Fang Chun Rd., Zhangjiang Hi-Tech Park Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com...
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