Advantech MIO-5393 User Manual page 8

Appendix A
A.1
Appendix B
B.1
B.2
B.3
B.4
MIO-5393 User Manual
4.1.1 Cooler ......................................................................................... 58
4.1.2 Heatsink...................................................................................... 59
4.1.3 Heatspreader .............................................................................. 59
Pin Assignments............................... 61
Jumper and Connector Settings ............................................................. 62
Table A.1: Jumper Settings ....................................................... 62
Table A.2: Connectors ............................................................... 62
Table A.3: J1 Clear CMOS ........................................................ 63
Table A.4: J2 Auto Power On Settings ...................................... 63
Table A.5: J3 COM1 Power Settings ......................................... 63
Table A.6: J4 LCD Power .......................................................... 64
Table A.7: J5 LVDS VCON Setting............................................ 64
Table A.8: CN1 12V Power Input............................................... 64
Table A.9: CN3 SODIMMDDR4_260 9.2mm............................. 64
Table A.10:CN4 SODIMMDDR4_260 5.2mm............................. 65
Table A.11:CN5 RTC Battery ..................................................... 65
Table A.12:CN7 CAN BUS ......................................................... 65
Table A.13:CN8 Front Panel....................................................... 66
Table A.14:CN9 Audio ................................................................ 66
Table A.15:CN10 SM BUS ......................................................... 67
Table A.16:CN11 I2C.................................................................. 67
Table A.17:CN12 COM1............................................................. 68
Table A.18:CN13 COM2............................................................. 68
Table A.19:CN14 GPIO_P0........................................................ 69
Table A.20:CN15 GPIO_P1........................................................ 70
Table A.21:CN16 RJ45_2x1_W/XFMR&LED ............................. 70
Table A.22:CN17 Inverter Power Output .................................... 71
Table A.23:CN18 48-bit LVDS Panel.......................................... 71
Table A.24:CN19 eDP ................................................................ 73
Table A.25:CN20 HDMI & DP++ ................................................ 75
Table A.26:CN21 M.2 E Key....................................................... 75
Table A.27:CN22 M.2 B key (Option for M.2 M key) .................. 76
Table A.28:CN24 NANO SIM ..................................................... 78
Table A.29:CN25 USB3.0_13H .................................................. 78
Table A.30:CN26 USB3.0_13H .................................................. 79
Table A.31:CN27 Internal USB................................................... 79
Table A.32:CN28 SATA Power................................................... 80
Table A.33:CN29 SATA_7V ....................................................... 80
Table A.34:CN30 SATA_7V ....................................................... 80
Table A.35:CN31 FAN ................................................................ 81
Table A.36:CN33 MIOe .............................................................. 81
System Assignments........................ 85
System I/O Ports..................................................................................... 86
Table B.1: System I/O Ports ...................................................... 86
DMA Channel Assignments .................................................................... 87
Table B.2: DMA Channel Assignments ..................................... 87
1st MB Memory Map............................................................................... 87
Table B.3: 1st MB Memory Map ................................................ 87
Interrupt Assignments ............................................................................. 87
Table B.4: Interrupt Assignments .............................................. 87
viii