Table of Contents
Advertisement
Figure 1-30 illustrates the write circuit detector used to trigger the write fault flip-flop U4C. The circuit is at 2B
on Figure 2-2. 1tansistor Q2 (8,9, and 10) remains in the off state until current flows through R9. The positive to
negative drop across R9 causes Q2 to turn on, allowing current to flow through Rll and R16 to ground. This will
clock the write fault flip-flop U4C, which is set if the WRITE GATE signal is not true (HI) and the drive is selected.
HEAD
SWITCH
+24V
R8
R9
WRln
ENAIlLE SWITCH
CURRENT SOURCE
AND DRIVER
Q2
FIGURE 1-30
- WRITE GATE
0
2
• WRITE
J
WRITE CURRENT DETECTOR
1.3.12 READ DATA CIRCUITS
o
+ WRITE FAULT
UItC.
5
7474
The block diagram in Figure 1-31 illustrates the functional areas of the Q2080 read channel. When the head
select switch connects the center tap of the selected head to ground, the diodes in the head coupling network become
forward biased. Magnetic flux changes then pass by the head coil inducing current into the coil. This current is
coupled through the head coupling diodes and appears as small differential voltage changes at the input of the pre-
amplifier. The pre-amplifier boosts these changes, which then travel through a low pass filter to eliminate unwanted
high frequency noise. The signal is again amplified and filtered before being input to the differentiator, which con-
verts the voltage peaks of the signal to zero voltage crossings. These zero voltage crossings represent the flux changes
read from the disk. They are input to a comparator which converts the sinusoidal signal to a square wave to drive a
pulse generator, This pulse generator is enabled whenever the drive is not writing and will output a pulse each time its
input switches. A droop ignore circuit filters the pulse train and sends it to a differential line driver. The outputs of
the line driver is the ± MFM READ DATA sent to the controller via the 20 conductor data cable.
REV A (01/84)
1-28
Advertisement
Table of Contents
