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HEAD
SWITCH
~
~
+--
r-
(
.~
~
HEAD
PRE~
LOW PASS
COUPLING
AMP
FIL TE R
,/'
DROOP
RD DATA
-
PULSE
f---
IGNORE
READ
GEN
CIRCUIT
DATA
DRIVER
- READ
I
FIGURE 1-31
READ CHANNEL BLOCK DIAGRAM
,
[>-
>
DIFF
V
COMPARATOR
+ MFM RD DATA
- MFM RD DATA
The droop ignore circuit eliminates false data pulses from the pulse train. These false pulses may be generated
when the differentiated signal droops toward zero volts while reading low frequency data patterns and noise causes
the signal to cross zero between legitimate bits. Figure 1-32 illustrates the effect and the function of the droop ignore
circuit.
Signal 1 shows an amplified IF pattern, which after filtering and differentiating looks similar to 2. Where signal
1 had a slow rate of change (between flux changes) the differentiated signal droops toward zero volts. The output of
the comparator should be as shown by the solid line in signal 3. However, noise in the read channel could cause the
droops in signal 2 to cross zero volts, giving the extra pulses shown by the dashed lines in 3. The result would be extra
bits in the output signal 4. Adding a one-shot and the flip-flop (droop ignore) between the comparator and the pulse
generator prevents the extra pulses from triggering the pulse generator. Signal 5 is now the pulse generator input and
the resulting output is signal 6 with no extra bits.
LOW PASS
FILTER
~
.'.
I I
' 0
o
::::
0
FlIP'FIOP
-
ON'
I--
>
SMor
(9
CD~
o
--uLJ1JLf1J
0_--,1
I
r
FIGURE 1-32
READ DROOP AND DROOP IGNORE
1-29
PUI SE
l,jFN
(9
'--_ _ _ -...J@
~
REV A (01/84)
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