Yamaha O2R96 Service Manual page 61

ICS2008BV-T (X2832B00) T.C. Reader/Generator
PIN
NAME I/O
NO.
1 INTR O Interrupt request
2 RESET I Master reset
3 FRAME I Color frame A / B input
4 CLICK I LTC SYNC input
5 LTCIN- I SMPTE LTC input -
6 LTCIN+ I SMPTE LTC input +
7 LTCOUT O SMPTE LTC output
8 LFC I External RC circuit
9 XTAL2 O 14.318 MHz crystal oscillator
10 XTAL1 I 14.318 MHz crystal oscillator
11 AVDD - Analog power supply
12 AVSS - Analog ground
13 COUT O C(Chroma) output
14 YOUT O Y(Luma) output
15 C2 I C(Chroma) input
16 Y2 I Y(Luma) input
17 C1 I C(Chroma) input
18 Y1 I Y(Luma) input
19 STHRESH I SYNC threshold bypass input
20 CTHRESH I Clamp threshold bypass input
21 DTHRESH I Data threshold bypass input
22 RXD I UART receive data
CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter)
PIN
NAME I/O
NO.
1 SDA/CDOUT I/O Serial control data I/O (I
2 AD0//CS I/O Address bit 0 (I
3 AD2 I Address bit 2 (I
4 RXP I Auxiliary AES3 Receiver port
5 DGND2 Digital ground
6 VD2+ Positive digital power supply (+5V)
7 DGND4
Digital ground
8 DGND3
9 /RST I Reset
10 NC1
Not used
11 NC2
12 ILRCK I/O Serial audio input left/right clock
13 ISCLK I/O Serial audio bit clock
14 SDIN I Serial audio data port
CS8420 (XW559A00) SRC (Sample Rate Converter)
PIN
NAME I/O
NO.
1 SDA/CDOUT I/O Serial control data I/O (I
2 AD0//CS I Address bit 0 (I
3 /EMPH O Pre-emphasis indicator output
4 RXP I
Differential line receiver inputs
5 RXN I
6 VA+ Positive analog power supply (+5V)
7 AGND Analog ground
8 FILT I/O PLL loop filter
9 /RST I Reset input
10 RMCK O Input section recovered master clock output
11 RERR O Receiver error indicator
12 ILRCK I/O Serial audio input port left/right clock input or output
13 ISCLK I/O Serial audio input port bit clock input or output
14 SDIN I Serial audio input port data input
FUNCTION
FUNCTION
2
C) / Data out (SPI)
2
C) / Control port chip select (SPI)
2
C)
FUNCTION
2
C) / data out (SPI)
2
C) / Control port chip select (SPI)
PIN
NAME I/O
NO.
23 CTS I Clear to send
24 TXD O UART transmit data
25 RTS O Ready to send
26 LRCLK O SMPTE LTC receive clock
27 VITCGATE O VITE cord is for video overlay
28 VITCOUT O SMPTE VITE output
29 A0 I Address bus
30 A1 I Address bus
31 /SMPTECS I SMPTE port chip select
32 /UARTCS I UART chip select
33 /IOR I Read enable
34 VSS - Digital ground
35 VDD - Digital power supply
36 /LOW I Write enable
37 D0 I/O
38 D1 I/O
39 D2 I/O
40 D3 I/O
Data bus
41 D4 I/O
42 D5 I/O
43 D6 I/O
44 D7 I/O
PIN
NAME I/O
NO.
15 TCBL I/O Transmit channel status block start
16 NC3
17 NC4 Not used
18 NC5
19 INT O Interrupt
20 U I/O User data
21 OMCK I Master clock
22 DGND Digital ground
23 VD+ Positive digital power supply (+5V)
24 H//S I Hardware/software control mode select
25 TXN O
Differential line drivers
26 TXP O
27 AD1/CDIN I Address bit 1 (I
28 SCL/CCLK I Control port clock
PIN
NAME I/O
NO.
15 TCBL I/O Transmit channel status block start
16 OSCLK I/O Serial audio output port bit clock input or output
17 OLRCK I/O Serial audio output port left/right clock input or output
18 SDOUT O Serial audio output port data output
19 /INT O Interrupt output
20 U I/O User data
21 OMCK I Output section master clock input
22 DGND Digital ground
23 VD+ Positive digital power supply (+5V)
24 H//S O Hardware or software control mode select
25 TXN O
Differential line driver outputs
26 TXP O
27 AD1/CDIN I Address bit 1 (I
28 SCL/CCLK I Control port clock
02R96
JK1: IC305
FUNCTION
JK1: IC101-103
FUNCTION
2
C) / Serial control data in (SPI)
JK1: IC003-005
FUNCTION
2
C) / Serial control data in (SPI)
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