Configuration Pins - Cpu; Default Module Cpu Configuration; Configuration Pins - Module; Identification Of The Module - Digi ConnectCore Wi-9P 9215 Hardware Reference Manual

C h a p t e r 1
X2 pin
number
78
79
80
None of the 64 GPIO pins on connector X2 disturb CPU boot strap functions. The
Configuration
boot strap functions are controlled by address signals. A user can not disturb boot
pins — CPU
strap functions from the outside if the module configuration signals, described
below, are correctly configured.

Default module CPU configuration

The user has access to six configuration signals:



The ConnectCore 9P 9215 Family of modules support the following JTAG signals:
Configuration
TCK, TMS, TDI, TDO, TRST#, and RTCK. Selection can be made between ARM debug
pins — Module
mode and boundary scan mode with the signal OCD_EN#.

Identification of the module

In order to make it easier for software to recognize a module and especially a
hardware variant of the module, a specific bit field made of 4 bits has been
reserved on the module. This bit field can be read out through GEN ID register and
corresponds to A[12:9]. These configuration signals use the internal CPU pull-up
resistor and can be pulled down through external population option 2k2 resistors.
In the same way, 3 bits are available on the module to identify the SDRAM
configuration scheme. These bits correspond to A[19:17]. It is impossible for the
user to disturb either the variant specific or SDRAM configuration specific bits from
outside.
In addition, the ConnectCore 9P 9215 Family of modules have reserved 4 bits for
special platform identification. This bit field can be read out through GEN ID register
and corresponds to A[16:13]. Configuration of these signals is done through the
SW_CONF pins. SW_CONF0 is connected to A13 through a 2k2 series resistor, and so on
for the further SW_CONF pins. Therefore, this bit can be set high by leaving the
ConnectCore 9P 9215, Wi-9P 9215 and 3G 9P 9215 Hardware Reference
25
Type Module Functionality
P V +3.3V
DD
P GND
P GND
LITTLE#/BIG_ ENDIAN which allows the user to select the endianess of the
module
OCD_EN# which allows the user to activate on-chip debugging
SW_CONF [3:0] which are reserved for the user; the user software can read out
these signals through the GEN ID register
I/O Multiplexing Comments
(@ 0xA090_0210).