Programmable Counter Array; Figure 1.8. Pca Block Diagram; Figure 1.9. Pca Block Diagram - Silicon Laboratories C8051F300 Manual

Mixed signal isp flash mcu family
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1.6.

Programmable Counter Array

An on-chip Programmable Counter/Timer Array (PCA) is included in addition to the three 16-bit general
purpose counter/timers. The PCA consists of a dedicated 16-bit counter/timer time base with three pro-
grammable capture/compare modules. The PCA clock is derived from one of six sources: the system clock
divided by 12, the system clock divided by 4, Timer 0 overflows, an External Clock Input (ECI), the system
clock, or the external oscillator clock source divided by 8. The external clock source selection is useful for
real-time clock functionality, where the PCA is clocked by an external source while the internal oscillator
drives the system clock.
Each capture/compare module can be configured to operate in one of six modes: Edge-Triggered Capture,
Software Timer, High Speed Output, 8- or 16-bit Pulse Width Modulator, or Frequency Output. Additionally,
Capture/Compare Module 2 offers watchdog timer (WDT) capabilities. Following a system reset, Module 2
is configured and enabled in WDT mode. The PCA Capture/Compare Module I/O and External Clock Input
may be routed to Port I/O via the Digital Crossbar.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
PCA
CLOCK
MUX
Capture/Compare
Capture/Compare
Module 0
Digital Crossbar
Port I/O

Figure 1.9. PCA Block Diagram

Rev. 2.9
C8051F300/1/2/3/4/5
16-Bit Counter/Timer
Capture/Compare
Module 1
Module 2
21

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