Table 16.3. Watchdog Timer Timeout Intervals - Silicon Laboratories C8051F300 Manual

Mixed signal isp flash mcu family
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C8051F300/1/2/3/4/5

Table 16.3. Watchdog Timer Timeout Intervals

System Clock (Hz)
24,500,000
24,500,000
24,500,000
18,432,000
18,432,000
18,432,000
11,059,200
11,059,200
11,059,200
3,062,500
3,062,500
3,062,500
Notes:
1. Assumes SYSCLK / 12 as the PCA clock source, and a PCA0L value of 0x00
at the update time.
2. Internal oscillator reset frequency for devices with a calibrated internal
oscillator. The reset system clock for devices with an uncalibrated internal
oscillator will vary.
166
2
2
2
32,000
32,000
32,000
Rev. 2.9
PCA0CPL2
Timeout Interval (ms)
255
128
32
255
128
32
255
128
32
255
128
32
255
24576
128
12384
32
1
32.1
16.2
4.1
42.7
21.5
5.5
71.1
35.8
9.2
257
129.5
33.1
3168

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