North Bridge - Supermicro X11DPG-OT-CPU User Manual

Super X11DPG-OT-CPU User's Manual
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Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
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CPU C State Control
Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable
and Disable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.
Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will signifi cantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
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Chipset Confi guration
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North Bridge

This feature allows the user to confi gure the settings for the Intel North Bridge.
 UPI (Ultra Path Interconnect) General Confi guration
This section displays the following UPI General Confi guration information:
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Number of CPU
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