Supermicro X11DPG-OT-CPU User Manual page 50

Super X11DPG-OT-CPU User's Manual
System Management Bus (SMBus) Header
A SMBus (I 2 C) header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here
to use the IPMB I 2 C connection on your system. Refer to the table below for pin defi nitions.
JPW19 JPW20
CPU2
1
External I
Pin Defi nitions
Pin# Defi nition
1 Data
2 Ground
3 Clock
4 No Connection
USB1/2 (3.0)
VGA
LAN2 LAN1 IPMI_LAN
LE1
USB3/4
(3.0)
LAN
CTRL
JSDCARD1
JM2-1
SD CARD
JPME1
JPG1 BMC
JP2
LEDM1
BIOS
LED1
J34 J32
J33 J31
JBT1
PCH
BIOS
BT1
JS1 JS2
LICENSE
SATA0-3 SATA4-7
BATTERY
X11DPG-OT-CPU
REV:1.00
CPU1
50
2 C Header
JPW21 JPW22
1. SMBus (JIPMB1)