IMS 5000 Series Manual page 20

CONFIGURING THE 645 CPU BOARD
Wait State Selection
The "WAIT" shunt indicates the number of wait states the CPU Walts after a
memory access. It is presently etched for no wait states.
ROM Location Selection
The "ROM" shunt is etched to indicate that the Initial Program Loader (IPL) boot
ROM is located on the 645 board.
If
this connection is cut, the system assumes
that the IPL is on the I/O board.
EPROM Type Selection
The" 16/32" shunt indicates the type of EPROM used. The "16" side is etched
to indicate the use of a 2716 2 Kbyte EPROM.
If
this connection was cut and
the "32" side shunted, it indicates that a 2732 4Kbyte EPROM is being used.
Interrupt Level Selection
The "VIl, VI7" shunt indicates the interrupt level for the real-time clock. This
is normally etched for level VI!.
IMS International
5000 Series Microcomputer s/7.0 1.8 3/page 18
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