IMS 5000 Series Manual page 16

CONFIGURING THE 451 Z-80 CPU BOARP
Legend
Wait State Select (Location IA)
The position of the shunt at JA indicates the number of states that the processor waits
after a memory read operation.
JA
1
0
2
0
3
0
Power On Address Select (Location IB)
No shunts
=
No memory wait state (normal)
Shunt JA 1-2 = One wait state
Shunt JA 2-3
=
Two wait states
JB
1
0 - - 0
16
2
0 - - 0
15
3
0 - - 0
14
4
0 - - 0
13
5
0 - - 0
12
6
0 - - 0
11
7
0 - - 0
10
8
0 - - 0
9
AI5
AH
A13
A12
All
A10
A9
A8
The shunt at J B indicates the address that the
processor jumps to when the system is powered up.
A shunt on a bit assigns a
0
value to that bit;
a bit with no shunt is assigned a '1' value. So
with all the shunts on, the power-on address is
OOOOH.
With all the shunts off, the power-on
address is FFOOH. This location is normally
etched for an address of 0000.
CPU Clock Select (Location IC)
JC
1
0 - - 0
4
2
0 0
3
4MHz
2MHz
This shunt is etched to provide the Z-
BOA
microprocessor with a 4MHz clock.
Address Mirror Select (Location
10)
JO
When this location is shunted, the Address
Mirror duplicates the I/O address onto the
upper 8 address lines.
' J
MWRITE+ ENABLE (Location IE)
o
0
1
JE
2
A shunt on location JE allows the MWRITE +
signal (indicating a wei te to memory) togo
out onto the bus. Normally, this location
is unshunted.
IMS International
5000 Series Microcomputers/7.01.83/page 14