Lvds Backlight (J8); Table 13. Lvds Backlight Connector Pinout - VersaLogic Tetra VL-EPC-2700 Hardware Reference Manual

Arm i.mx6 single board computer with gigabit ethernet, video, usb, sata, serial i/o, digital i/o, can bus, spi, mini pcie, msata and i2c
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Pin
LVDS_TX1_P
12
LVDS_TX1_N
13
GND
14
LVDS_TX0_P
15
LVDS_TX0_N
16
GND
17
GND
18
V3P3_LVDS_PANEL
19
V3P3_LVDS_PANEL
20

LVDS Backlight (J8)

Table 13. LVDS Backlight Connector Pinout

Pin
1
LVDS_BKLT_EN
2
GND
3
LVDS_BLKT_CTRL
4
V_LVDS_BKLGT
22
Signal
Direction
Output
Output
--
Output
Output
--
--
Output
Output
Direction Relative to
Signal
Our Product
Output
--
Output
Input
Interfaces and Connectors
Description
LVDS Data 1 (positive)
LVDS Data 1 (negative)
Signal Ground
LVDS Data 0 (positive)
LVDS Data 0 (negative)
Power Ground
Power Ground
LVDS Panel Power (+3.3V)
LVDS Panel Power (+3.3V)
Description
Backlight Enable for LVDS panel
Ground
Backlight Control for LVDS panel (PWM)
Voltage for LVDS Backlight control
Tetra (VL-EPC-2700) Reference Manual

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