Linear Technology LTC1736 Datasheet page 10

LTC1736
U
OPERATIO
(Refer to Functional Diagram)
INTV /EXTV Power
CC CC
Power for the top and bottom MOSFET drivers and most
of the internal circuitry of the LTC1736 is derived from the
INTV pin. When the EXTV
CC
5.2V low dropout regulator supplies the INTV
from V . If EXTV is raised above 4.7V, the internal
IN CC
regulator is turned off and an internal switch connects
EXTV to INTV . This allows a high efficiency source,
CC CC
such as the notebook main 5V system supply or a second-
ary output of the converter itself, to provide the INTV
power. Voltages up to 7V can be applied to EXTV
additional gate drive capability.
To provide clean start-up and to protect the MOSFETs,
undervoltage lockout is used to keep both MOSFETs off
until the input voltage is above 3.5V.
APPLICATIO S I FOR ATIO
The basic LTC1736 application circuit is shown in
Figure 1 on the first page of this data sheet. External
component selection is driven by the load requirement
and begins with the selection of R
known, C and L can be chosen. Next, the power MOS-
OSC
FETs and D1 are selected. The operating frequency and the
inductor are chosen based largely on the desired amount
of ripple current. Finally, C
handle the large RMS current into the converter and C
is chosen with low enough ESR to meet the output voltage
ripple and transient specifications. The circuit shown in
Figure 1 can be configured for operation up to an input
voltage of 28V (limited by the external MOSFETs).
R Selection For Output Current
SENSE
R is chosen based on the required output current.
SENSE
The LTC1736 current comparator has a maximum thresh-
old of 75mV/R and an input common mode range of
SENSE
SGND to 1.1(INTV ). The current comparator threshold
CC
sets the peak of the inductor current, yielding a maximum
average output current I
MAX
half the peak-to-peak ripple current, ∆I
Allowing a margin for variations in the LTC1736 and
external component values yields:
10
pin is left open, an internal
CC
power
CC
CC
. Once R
SENSE SENSE
is selected for its ability to
IN
equal to the peak value less
.
L
VID Control
Bits VID0 to VID4 are logic inputs setting the output volt-
age using an internal 5-bit DAC as a feedback resistive
voltage divider. The output voltage can be set in 50mV or
25mV increments from 0.925V to 2.0V according to
Table 1. Pins VID0 to VID4 are internally pulled up to
VIDV .
CC
PGOOD
CC A window comparator monitors the output voltage and its
for
open-drain output is pulled low when the divided down
output voltage is not within ±7.5% of the reference voltage
of 0.8V.
50 mV
=
R
SENSE
I
MAX
is
C Selection for Operating Frequency
OSC
and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
OUT
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation re-
quires more inductance for a given amount of ripple
current.
The LTC1736 uses a constant-frequency architecture with
the frequency determined by an external oscillator capaci-
tor C . Each time the topside MOSFET turns on, the
OSC
voltage on C is reset to ground. During the on-time
OSC
C is charged by a fixed current. When the voltage on the
OSC
capacitor reaches 1.19V, C
process then repeats.
The value of C
OSC
frequency assuming no external clock input on the FCB
pin:
is reset to ground. The
OSC
is calculated from the desired operating