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Linear Technology LTC1736 Datasheet

5-bit adjustable high efficiency synchronous step-down switching regulator

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FEATURES
Dual N-Channel MOSFET Synchronous Drive
Synchronizable/Programmable Fixed Frequency
Wide V
Range: 3.5V to 36V Operation
IN
5-Bit Digital-to-Analog V
0.925V to 2.00V Range with 50mV/25mV Steps
TM
OPTI-LOOP
Compensation Minimizes C
±
1% Output Voltage Accuracy
Power Good Output Voltage Monitor
Active Voltage Positioning Compatible
Output Overvoltage Crowbar Protection
Internal Current Foldback
Latched Short-Circuit Shutdown Timer
with Defeat Option
Forced Continuous Control Pin
Optional Programmable Soft-Start
Remote Output Voltage Sense
Available in 24-Lead SSOP Package
U
APPLICATIO S
Notebook and Palmtop Computers, PDAs
Power Supply for Mobile Pentium
Pentium III Processors
Low Voltage Power Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
OPTI-LOOP and Burst Mode are trademarks of Linear Technology Corporation.
Pentium is a registered trademark of Intel Corporation.
TYPICAL APPLICATIO
C
SS
0.1µF
R
C
33k
C
C2
47pF
Step-Down Switching Regulator
Selection:
OUT
OUT
®
II and
C
OSC
47pF
C
V
OSC
IN
TG
RUN/SS
C
C1
SW
330pF
LTC1736
VIDV
I
CC
TH
INTV
CC
PGOOD
BOOST
VID4
VID3
VID2
BG
VID1
VID0
SGND
PGND
+
V
SENSE
SENSE
OSENSE
1000pF
47pF
Figure 1. High Efficiency Step-Down Converter
High Efficiency Synchronous
DESCRIPTIO
®
The LTC
1736 is a synchronous step-down switching
regulator controller optimized for CPU power. The output
voltage is programmed by a 5-bit digital-to-analog con-
verter (DAC) that adjusts the output voltage from 0.925V
to 2.00V according to Intel mobile VID specifications. The
0.8V reference is compatible with future microprocessor
generations.
The operating frequency (synchronizable up to 500kHz) is
set by an external capacitor allowing maximum flexibility
in optimizing efficiency. The output voltage is monitored by
a power good window comparator that indicates when the
output is within 7.5% of its programmed value.
Protection features include: internal foldback current lim-
iting, output overvoltage crowbar and optional short-cir-
cuit shutdown. Soft-start is provided by an external capaci-
tor that can be used to properly sequence supplies. The
operating current level is user-programmable via an exter-
nal current sense resistor. Wide input supply range allows
operation from 3.5V to 30V (36V maximum).
Pin defeatable Burst Mode
ciency at low load currents. OPTI-LOOP compensation
allows the transient response to be optimized over a wide
range of output capacitance and ESR values.
V
IN
5V TO 24V
C
IN
22µF/50V
M1
× 2
FDS6680A
CERAMIC
D
B
CMDSH-3
C
B
0.22µF
+
4.7µF
M2
D1
FDS6680A
MBRS340T3
× 2
LTC1736
5-Bit Adjustable
TM
operation provides high effi-
L1
R
SENSE
1.2µH
0.004Ω
V
OUT
1.35V TO 1.60V
12A
+
C
OUT
180µF/4V
× 4
C
: PANASONIC EEFUEOG181R
OUT
C
: MARCON THCR70EIH226ZT
IN
L1: PANASONIC ETQP6RZIR20HFA
R
: IRC LRF2010-01-R004J
SENSE
1736 F01
1

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Summary of Contents for Linear Technology LTC1736

  • Page 1 ESR values. , LTC and LT are registered trademarks of Linear Technology Corporation. OPTI-LOOP and Burst Mode are trademarks of Linear Technology Corporation. Pentium is a registered trademark of Intel Corporation.
  • Page 2: Electrical Characteristics

    LTC1736 ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO (Note 1) Input Supply Voltage (V )......36V to – 0.3V ORDER PART TOP VIEW Topside Driver Supply Voltage (BOOST)..42V to – 0.3V NUMBER Switch Voltage (SW) ........36V to – 5V...
  • Page 3 • 110°C/W) Note 7: Each built-in pull-up resistor attached to the VID inputs also has a Note 3: The LTC1736 is tested in a feedback loop that servos V to the series diode to allow input voltages higher than the VIDV...
  • Page 4 LTC1736 TYPICAL PERFOR A CE CHARACTERISTICS Efficiency vs Load Current (3 Operating Modes) Efficiency vs Load Current Efficiency vs Input Voltage EXTV = 5V EXTV OPEN EXTV = 5V = 1.6V FIGURE 1 BURST = 5V SYNC = 5A CONT...
  • Page 5 LTC1736 TYPICAL PERFOR A CE CHARACTERISTICS Maximum Current Sense Threshold vs Normalized Output Voltage Maximum Current Sense Threshold Maximum Current Sense Threshold (Foldback) vs V vs Sense Common Mode Voltage RUN/SS = 1.6V SENSE(CM) NORMALIZED OUTPUT VOLTAGE (%) COMMON MODE VOLTAGE (V)
  • Page 6 LTC1736 TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency Dynamic VID Change, Dynamic VID Change, vs Temperature Burst Mode Operation Defeated Burst Mode Operation Enabled = 47pF FCB = 0V FCB = PGOOD 100mV/DIV 100mV/DIV 5A/DIV 5A/DIV PGOOD PGOOD 5V/DIV 5V/DIV...
  • Page 7 LTC1736 PI FU CTIO S VID0 to VID4 (Pins 11 to 15): Digital Inputs for controlling (Pin 1): External capacitor C from this pin to the output voltage from 0.925V to 2.0V. Table 1 specifies ground sets the operating frequency.
  • Page 8 While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor The LTC1736 uses a constant frequency, current mode current starts to reverse, as indicated by current com- step-down architecture. During normal operation, the parator I2, or the beginning of the next cycle.
  • Page 9 C is used as a short-circuit time-out circuit. If The LTC1736 has three low current modes controlled by the output voltage falls to less than 70% of its nominal the FCB pin. Burst Mode operation is selected when the...
  • Page 10 Power for the top and bottom MOSFET drivers and most Bits VID0 to VID4 are logic inputs setting the output volt- of the internal circuitry of the LTC1736 is derived from the age using an internal 5-bit DAC as a feedback resistive INTV pin.
  • Page 11 LTC1736 APPLICATIO S I FOR ATIO cycles to recharge the bootstrap capacitor. This minimizes   1 61 10   audible noise while maintaining reasonably high efficiency. –   Frequency   Inductor Value Calculation A graph for selecting C...
  • Page 12 Two external power MOSFETs must be selected for use DS(ON) efficiency. The synchronous MOSFET losses are greatest with the LTC1736: An N-channel MOSFET for the top at high input voltage or during a short circuit when the duty (main) switch and an N-channel MOSFET for the bottom cycle in this switch is nearly 100%.
  • Page 13 LTC1736 APPLICATIO S I FOR ATIO Larger diodes can result in additional transition losses due required ESR < 2.2 R SENSE to their larger junction capacitance. The diode may be > 1/(8fR SENSE omitted if the efficiency loss can be tolerated.
  • Page 14 Aluminum electrolytic, dry tantalum and special polymer maximum junction temperature rating for the LTC1736 to capacitors are available in surface mount packages. Spe- be exceeded. The system supply current is normally cial polymer surface mount capacitors offer very low ESR dominated by the gate charge current.
  • Page 15 MUST be in the range of 2.7V Refer to the LTC1735 data sheet for details. The charge to 5.5V and MUST be alive prior to enabling the LTC1736. pump has the advantage of simple magnetics.
  • Page 16 Note: *, ** represents codes without a defined output voltage as specified in Intel specifications. The LTC1736 interprets these codes as valid inputs and produces output voltages as follows: [01111] = 1.250V, [11111] = 0.900V.
  • Page 17 The RUN/SS pin is a multipurpose pin that provides a soft- The RUN/SS pin also provides the ability to shut off the start function and a means to shut down the LTC1736. controller and latchoff when an overcurrent condition is...
  • Page 18 LTC1736 will begin cycle skipping in order to limit the the new VID code, always protecting the load (CPU). If short-circuit current. In this situation the bottom MOSFET dynamic VID code changes are anticipated and the mini- will be conducting the peak current.
  • Page 19 Minimum on-time t is the smallest amount of time ON(MIN) that the LTC1736 is capable of turning the top MOSFET on FCB Pin Operation and off again. It is determined by internal timing delays and When the DC voltage on the FCB pin drops below its 0.8V the gate charge required to turn on the top MOSFET.
  • Page 20 R3 and losses, four main sources usually account for most of the losses in LTC1736 circuits: 1) LTC1736 V current, 2) The internal LTC1736 oscillator can be synchronized to an INTV current, 3) I R losses, 4) Topside MOSFET transi- external oscillator by clocking the FCB pin with a signal tion losses.
  • Page 21 LTC1736 APPLICATIO S I FOR ATIO 0.06Ω. This results in losses ranging from 3% to 17% DC coupled and AC filtered closed-loop response test as the output current increases from 1A to 5A for a 1.8V point. The DC step, rise time and settling at this test point output, or 4% to 20% for a 1.5V output.
  • Page 22 ±0.112V. The LTC1736 output voltage and stay within the specified voltage range. Less output R3 680k 7.5V TO 24V...
  • Page 23 LTC1736 APPLICATIO S I FOR ATIO accuracy is ±1%, so the output transient voltage cannot At minimum load current: exceed ±0.097V. At V = 1.5V, the maximum output     voltage change controlled by the I pin would be: −...
  • Page 24 Note that the transient suppressor should not conduct during double-battery operation, but must still clamp the input voltage below breakdown of the converter. Although the LTC1736 has a maximum input voltage of LOAD 36V, most applications will be limited to 30V by the...
  • Page 25 The minimum on-time occurs at maximum V and mini- mum V 1. Are the signal and power grounds segregated? The LTC1736 PGND pin should tie to the GND plane close to the input capacitor. The SGND pin should then connect ON MIN 22 275...
  • Page 26 All of these nodes have very large and increase noise rejection. fast moving signals and therefore should be kept on the “output side” (Pins 13 to 24) of the LTC1736 and 4. Does the (+) terminal of C connect to the drain of the occupy minimum PC trace area.
  • Page 27 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
  • Page 28: Related Parts

    LTC1735-1 High Efficiency Step-Down Controller with Power Good Output Fault Protection, 16-Pin SSOP and SO-8 Adaptive Power and No R are trademarks of Linear Technology Corporaton. SENSE 1736f LT/TP 1299 4K • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear-tech.com...