Functional Block Diagram; Power Supply - Silicon Laboratories Si5372 User Manual

1. Functional Block Diagram

A functional block diagram of the Si5372-EVB is shown below. Keep in mind the J grade does not use an external XTAL or reference
and does not use the XA/XB pins. This EVB can be connected to a PC via the main USB connector for programming, control, and
monitoring. See or Section 2. Quick Start
Main USB
Connector
Ext +5V
Connector
C8051F380
MCU
+
Peripherals
{
Input Clock 0
{
Input Clock 1
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Power only
+5V_USB

Power Supply

+5V_Ext
VDDMCU
I2C/SPI Bus
I2C/SPI Bus
Control/
Status
INTR
Alarm_Status
48 MHz
XA
XTAL
XB
IN_0
Input
Termination
IN_0B
IN_1
Input
Termination
IN_1B
Figure 1.1. Si5372-EVB Functional Block Diagram
Si5372
OUT_0
OUT_0B
OUT_1
OUT_1B
OUT_2
OUT_2B
OUT_3
OUT_3B
UG372: Si5372 Evaluation Board User's Guide
Functional Block Diagram
}
Output
Output Clock 0
Termination
}
Output
Output Clock 1
Termination
}
Output
Output Clock 2
Termination
}
Output
Output Clock 3
Termination
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