Silicon Laboratories Si5386 User Manual

Si5386 Evaluation Board User's Guide
The Si5386E-E-EB is used for evaluating the Ultra Low Jitter, Any-
Frequency, 12-output JESD204B Clock Generator. The Si5386
employs fourth-generation DSPLL technology to enable clock gen-
eration for LTE/ JESD204B applications which require the highest
level of jitter performance. The Si5386E-E-EB has four independ-
ent input clocks and a total of 12 outputs. The Si5386E-E-EB can
be easily controlled and configured using Silicon Labs' Clock
Builder Pro™ (CBPro™) software tool.
The device revision is distinguished by a white 1 inch x 0.187 inch label with the text
"Si5386E-E-EB" installed in the lower left hand corner of the board. (For ordering purpo-
ses only, the terms "EB" and "EVB" refer to the board and the kit respectively. For the
purpose of this document, the terms are synonymous in context.)
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EVB FEATURES
• Powered from USB port or external power
supply
• Internal 48.0231 MHz crystal provides
holdover mode of operation on the Si5386
• CBPro™ GUI programmable VDDO
supplies allow each of the ten primary
outputs to have its own supply voltage
selectable from 3.3, 2.5, or 1.8 V
• CBPro™ GUI-controlled voltage, current,
and power measurements of VDD, VDDA,
and all VDDO supplies
• Status LEDs for power supplies and
control/status signals of Si5386
• SMA connectors for input clocks, output
clocks and optional external timing
reference clock
Rev. 0.1