Silicon Laboratories Si5397 User Manual
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Silicon Laboratories Si5397 User Manual

Silicon Laboratories Si5397 User Manual

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UG353: Si5397 Evaluation Board User's
Guide
The Si5397-EVB is used for evaluating the Si5397 Any-Frequency, Any-Output, Jitter-
Attenuating Clock Any-Frequency, Any-Output, Jitter-Attenuating Clock Multiplier Revi-
sion A. The device grade and revision is distinguished by a white 1 inch x 0.187 inch
label installed in the lower left hand corner of the board. In the example below, the label
"SI5397A-A-EB" indicates the evaluation board has been assembled with an Si5397 de-
vice, Grade A,Revision A, installed. (For ordering purposes only, the terms "EB" and
"EVB" refer to the board and the kit, respectively. For the purpose of this document, the
terms are synonymous in context.)
silabs.com | Building a more connected world.
KEY FEATURES
• Powered from USB port or external +5 V
power supply via screw terminals
• Onboard 48 MHz XTAL allows standalone
or holdover mode of operation on the
Si5397
• CBPro™ GUI programmable VDD supply
allows device supply voltages of 3.3, 2.5,
or 1.8 V
• CBPro GUI programmable VDDO supplies
allow each of the eight outputs to have its
own supply voltage selectable from 3.3,
2.5, or 1.8 V
• CBPro GUI allows control and
measurement of voltage, current, and
power of VDD and all eight VDDO supplies
• Status LEDs for power supplies and
control/status signals of the Si5397
• SMA connectors for input clocks, output
clocks and optional external timing
reference clock
Rev. 0.1

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Summary of Contents for Silicon Laboratories Si5397

  • Page 1 In the example below, the label • Powered from USB port or external +5 V "SI5397A-A-EB" indicates the evaluation board has been assembled with an Si5397 de- power supply via screw terminals vice, Grade A,Revision A, installed.

  • Page 2: Functional Block Diagram

    UG353: Si5397 Evaluation Board User's Guide Functional Block Diagram 1. Functional Block Diagram Below is a functional block diagram of the Si5397-A-EB. This evaluation board can be connected to a PC via the main USB connector for programming, control, and monitoring. See 3. Quick Start 10.3 Overview of ClockBuilderPro Applications...
  • Page 3 UG353: Si5397 Evaluation Board User's Guide Si5397-A-EVB Support Documentation and ClockBuilderPro™ Software 2. Si5397-A-EVB Support Documentation and ClockBuilderPro™ Software All Si5397-A-EVB schematics, BOMs, User’s Guides, and software can be found online at: http://www.silabs.com/products/clocksoscil- lators/pages/si539x-evb.aspx. silabs.com | Building a more connected world.

  • Page 4: Quick Start

    3. Quick Start 1. Install the ClockBuilderPro desktop software from http://www.silabs.com/CBPro. 2. Connect a USB cable from the Si5397-A-EB to the PC where the software was installed. 3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software.

  • Page 5: Jumper Defaults

    JP20 2-pin JP41 2-pin JP21 2-pin 5 x 2 Hdr All 5 installed JP22 2-pin Note: 1. Refer to the Si5397-A-EB schematics for the functionality associated with each jumper. silabs.com | Building a more connected world. Rev. 0.1 | 5...

  • Page 6: Status Leds

    D21, and D24 are status LEDs showing onboard MCU activity. D2 indicates loss of signal at XAXB input (either crystal osc or external reference). D5, D6, D8, D12 indicate loss of lock for one of four internal DSPLLs (A–D). D11 indicates the Si5397 interrupt output is active (as configured by Si5397 register programming).

  • Page 7: External Reference Input (Xa/Xb)

    An external timing reference (48 MHz XTAL) is used in combination with the internal oscillator to produce an ultra-low jitter reference clock for the DSPLL and for providing a stable reference for the free-run and holdover modes.The Si5397-A-EB can also accommodate an external reference clock instead of a crystal.To evaluate the device with an external REFCLK, C111 and C113 must be populated...

  • Page 8: Clock Input Circuits (Inx/Inxb)

    7. Clock Input Circuits (INx/INxB) The Si5397-A-EB has eight SMA connectors (IN0, IN0B–IN3, IN3B) for receiving external clock signals. All input clocks are terminated as shown below. Note that input clocks are ac-coupled and 50 Ω terminated. This represents four differential input clock pairs. Single- ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock.

  • Page 9: Clock Output Circuits (Outx/Outxb)

    The output clock termination circuit is shown below. The output signal will have no dc bias. If dc coupling is required, the ac cou- pling capacitors can be replaced with a resistor of appropriate value. The Si5397-A-EB provides pads for optional output termination resistors and/or low-frequency capacitors.
  • Page 10 UG353: Si5397 Evaluation Board User's Guide Installing ClockBuilderPro (CBPro) Desktop Software 9. Installing ClockBuilderPro (CBPro) Desktop Software To install the CBOPro software on any Windows 7 (or above) PC, go to http://www.silabs.com/CBPro and download the ClockBuilder- Pro software. Installation instructions and User’s Guide for ClockBuilderPro can be found at the download link shown above.

  • Page 11: Using The Si5397-Evb

    UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB 10. Using the Si5397-EVB 10.1 Connecting the EVB to Your Host PC Once ClockBuilderPro software is installed, connect to the EVB with a USB cable as shown in the figure below: Figure 10.1.
  • Page 12 10.2 Additional Power Supplies The Si5397-A-EB comes preconfigured with jumpers installed at JP15 and JP16 (pins1–2 in both cases) in order to select “USB”. These jumpers, together with the components installed, configure the evaluation board to obtain all +5 V power solely through the main USB connector at J37.
  • Page 13 • Export: create in-system programming Figure 10.4. Application #2: EVBGUI Use the EVB GUI to: • Download configuration to EVB’s DUT (Si5397) • Control the EVB’s regulators • Monitor voltage, current, and power on the EVB silabs.com | Building a more connected world.
  • Page 14 Using the Si5397-EVB 10.4 Common ClockBuilderPro Workflow Scenarios There are three common workflow scenarios when using CBPro and the Si5397-A-EVB. These workflow scenarios are: • Workflow Scenario 1: Testing a Silicon Labs-Created Default Configuration • Workflow Scenario 2: Modifying the Default Silicon Labs-Created Device Configuration •...
  • Page 15 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Once you open the default plan (based on your EVB model number), a popup will appear: Figure 10.7. Write Design to EVB Dialog Select “Yes” to write the default plan to the Si5395 device mounted on your EVB. This ensures the device is completely reconfigured per the Silicon Labs default plan for the DUT type mounted on the EVB.
  • Page 16 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Figure 10.10. EVB GUI Window silabs.com | Building a more connected world. Rev. 0.1 | 16...
  • Page 17 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB 10.5.1 Verify Free-Run Mode Operation Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled “INx/INxB”) located around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the DUT will be locked to the crystal in this case.
  • Page 18 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Figure 10.12. View Design Report Your configuration’s design report will appear in a new window, as shown below. Compare the observed output clocks to the frequen- cies and formats noted in your default project’s Design Report.
  • Page 19 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Figure 10.13. Design Report Window 10.5.2 Verify Locked Mode Operation Assuming you connect the correct input clocks to the EVB (as noted in the Design Report shown above), the DUT on your EVB will be running in “locked”...
  • Page 20 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB 10.6 Workflow Scenario 2: Modifying the Default Silicon Labs-Created Device Configuration To modify the “default” configuration using the CBPro Wizard, click on the links below under “Edit Configuration with Wizard”. Figure 10.14. Edit Configuration with Wizard You will now be taken to the Wizard’s step-by-step menus to allow you to change any of the default plan’s operating configurations.
  • Page 21 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Figure 10.15. Design Wizard Note that you can click on the icon on the lower left hand corner of the menu to confirm if your frequency plan is valid. After making your desired changes, you can click on Write to EVB to update the DUT to reconfigure your device real-time.
  • Page 22 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB 10.7 Workflow Scenario 3: Testing a User-Created Device Configuration To test a previously created user configuration, open the CBPro Wizard by clicking on the icon on your desktop and then selecting Open Design Project File.
  • Page 23 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB 10.8 Exporting the Register Map File for Device Programming by a Host Processor You can also export your configuration to a file format suitable for in-system programming by selecting Export as shown below: Figure 10.20.
  • Page 24 UG353: Si5397 Evaluation Board User's Guide Using the Si5397-EVB Figure 10.21. Export Settings silabs.com | Building a more connected world. Rev. 0.1 | 24...

  • Page 25: Writing A New Frequency Plan Or Device Configuration To Non-Volatile Memory (Otp)

    11. Writing a New Frequency Plan or Device Configuration to Non-Volatile Memory (OTP) Note: Writing to the device non-volatile memory (OTP is NOT the same as writing a configuration into the Si5397 using Clock- Builder- PRo on the Si5397-A-EB. Writing a configuration into the EVB from ClockBuilderPro is done using Si5397 RAM space and can be done a virtually unlimited numbers of times.

  • Page 26: Serial Device Communications

    The MCU onboard the Si5397-A-EB communicates with the Si5397 device through a 4-wire SPI (Serial Peripheral Interface) link. The MCU is the SPI master and the Si5397 device is the SPI slave. The Si5397 device can also support a 2-wire I...

  • Page 27: Si5397-Evb Schematic, Layout, And Bill Of Materials (Bom)

    The Si5397-EB Schematic, Layout, and Bill of Materials (BOM) can be found online at: http://www.silabs.com/products/clocksoscilla- tors/pages/si539x-evb.aspx. Note: Please be aware that the Si5397-A-EB schematic is in OrCad Capture hierarchical format and not in a typical “flat” schematic format. silabs.com | Building a more connected world.
  • Page 28 Trademark Information Silicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Micrium, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress®, Zentri, Z-Wave, and others are trademarks or...

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