Hardware Preparation and Installation
1
.
1-16
ON
Table 1-3. MC2 DRAM Size Settings
S3
S3
Segment 1
Segment 2
ON
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
Notes As shown in the preceding table, the Petra/MC2 interface
supports parity DRAM emulations up to 16MB. For sizes
beyond 16MB, it is necesary to use the MCECC memory
model.
For access to the MCECC registers, you must first disable the
MC2 interface by setting S3 to 001 (Off/Off/On). Further details
on selecting the MCECC emulation can be found under
DRAM Size
(S6).
If you modify the switch settings, you will need to execute env;d
<CR> so that the firmware recognizes the new memory defaults.
S3
OFF
4
MC2 DRAM SIZE
1
16MB
(factory configuration)
S3
MC2 DRAM
Segment 3
ON
ON
OFF
ON
OFF
Computer Group Literature Center Web Site
2734 0004
Size
1MB
4MB
8MB
Disabled
16MB
MCECC