Clocking - XMOS xCORE-200 Multi-channel Audio board Design Manual

USB Audio Design Guide
This method of port usage (i.e. sharing a port between cores) is outside the
standard XC usage model so is implemented using inline assembly as required.
The peek instruction is used to get the current output value on the port:
/* Peek at current port value using port 32 A resource ID */
asm ( " peek %0 , res [%1] " := r " ( x ) : " r " ( XS1_PORT_32A ) ) ;
The required output value is then assembled using the relevant bit-wise operation(s)
before the out instruction is used directly to output data to the port:
/* Output to port */
asm ( " out res [%0] , %1 " :: " r " ( XS1_PORT_32A ) ," r " ( x ) ) ;
The table Figure
Class 2.0 reference design board. Note, they are all outputs from the XS1-L device.
Pin
XD49
XD50
XD51
Figure 34:
Port 32A XD52
Signals
XD53

6.1.2 Clocking

The board has two on-board oscillators for master clock generation. These produce
11.2896MHz for sample rates 44.1, 88.2, 176.4KHz etc and 24.567MHz for sample
rates 48, 96, 192kHz etc.
The required master clock is selected from one of these using an external mux cir-
cuit via port P32A[2] (pin 2 of port 32A). Setting P32A[2] high selects 11.2896MHz,
low selects 24.576MHz.
The reference design board uses a 24 bit, 192kHz stereo audio CODEC (Cirrus
Logic CS4270).
The CODEC is configured to operate in stand-alone mode meaning that no serial
configuration interface is required. The digital audio interface is set to I2S mode
with all clocks being inputs (i.e. slave mode).
The CODEC has three internal modes depending on the sampling rate used. These
change the oversampling ratio used internally in the CODEC. The three modes are
shown below:
In stand-alone mode, the CODEC automatically determines which mode to operate
in based on input clock rates.
XM0088546.1
34 shows the signals connected to port 32A on the USB Audio
Port Signal
P32A0 USB_PHY_RST_N
P32A1 CODEC_RST_N
P32A2 MCLK_SEL
P32A3 LED_A
P32A4 LED_B
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