Audio Driver - XMOS xCORE-200 Multi-channel Audio board Design Manual

Usb audio
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USB Audio Design Guide
This asynchronous clocking scheme means that the device is the clocking master
than therefore means a high-quality local master clock source can be used.
After each received USB SOF token, the buffering core takes a time-stamp from
a port clocked off the master clock. By subtracting the time-stamp taken at the
previous SOF, the number of master clock ticks since the last SOF is calculated.
From this the number of samples (as a fixed point number) between SOFs can be
calculated. This count is aggregated over 128 SOFs and used as a basis for the
feedback value.
The sending of feedback to the host is also handled in the USB buffering core via
an explicit feedback IN endpoint. If both input and output is enabled then the
feedback is implicit based on the audio stream sent to the host.
3.4.4.2 USB Rate Control
The Audio core must consume data from USB and provide data to USB at the correct
rate for the selected sample frequency. The USB 2.0 Specification states that the
maximum variation on USB packets can be +/- 1 sample per USB frame. USB frames
are sent at 8kHz, so on average for 48kHz each packet contains six samples per
channel. The device uses Asynchronous mode, so the audio clock may drift and run
faster or slower than the host. Hence, if the audio clock is slightly fast, the device
may occasionally input/output seven samples rather than six. Alternatively, it may
be slightly slow and input/output five samples rather than six. Figure
the allowed number of samples per packet for each example audio frequency.
See USB Device Class Definition for Audio Data Formats v2.0 section 2.3.1.1 for
full details.
Frequency (kHz)
44.1
48
88.2
Figure 11:
96
Allowed
samples per
176.4
packet
192
To implement this control, the decoupler core uses the feedback value calculated
in the buffering core. This value is used to work out the size of the next packet it
will insert into the audio FIFO.

3.5 Audio Driver

The audio driver receives and transmits samples from/to the decoupler or mixer
core over an XC channel. It then drives several in and out I2S/TDM channels. If
the firmware is configured with the CODEC as slave, it will also drive the word and
bit clocks in this core as well. The word clocks, bit clocks and data are all derived
XM0088546.1
Min Packet
Max Packet
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