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sliceKIT hardware manual
to the Chain connector and the Star slot. The links from Tile 1 are connected to
the Square slot.
The only complication in this system is use of the xSCOPE 2-bit xCONNECT Link.
This link overlaps a 4 bit port on the Star slot connector so it is not possible to use
this for user I/O at the same time as xSCOPE.
To work around this, a switch is present on the xSYS adapter board to either enable
or disable the xSCOPE xCONNECT Link. When disabled, these pins are disconnected
from the Chain connector and are free for use on the Star slot. When enabled they
will work as an xCONNECT Link and hence appear on the relevant pins of the Star
slot.
It is recommended that if a sliceCARD is used in the Star Slot the XSCOPE switch is
off on the xSYS adaptor card to ensure correct operation of the sliceCARD in the
Star slot.
2.7 Reset
The whole system is held in reset until all power supplies are stable, and reset
is connected to all Slice Cards so any circuitry on them can be reset. Reset also
indicates to the sliceCARDs that their power input is stable. The reset from the
xTAG-2 resets the whole system, if required for debugging.
2.8 Clocking
The system clock has two sources: an on-board 25MHz oscillator or the CLK signal
from the Chain connector. The system clock source is selected automatically
according to the presence of signals on the Chain connector.
This means the system clock from a Master core board is fed automatically to all
of the slave core boards so the whole system will operate synchronously.
The system clock is also fed to each of the sliceCARD slots.
2.9 Testpoints
Each xCORE I/O signal is also available on a 0.1" header, next to the slot that it is
connected to. These connections can be used to connect an oscilloscope or logic
analyser, or for interconnection of signals for advanced development work.
The signals are identified on the silkscreen layer of the sliceKIT core board; the
table below lists their relationship to the internal ports.
REV A
L16 Pin
Slot
X0D0
TRIANGLE
X0D1
STAR
CHAIN
PCIE
Function
B2
P1A0
A8
P1B0
B10
10/31
(continued)
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